mac_hi
u32 mac_hi, mac_lo;
mac_hi = ((mdb->addr[0] << 8) | mdb->addr[1]);
((static_table[2] & ALU_V_MAC_ADDR_HI) == mac_hi) &&
u32 mac_hi, mac_lo;
mac_hi = ((mdb->addr[0] << 8) | mdb->addr[1]);
((static_table[2] & ALU_V_MAC_ADDR_HI) == mac_hi) &&
static_table[2] |= mac_hi;
static void bnx2x_set_mac_buf(u8 *mac_buf, u32 mac_lo, u16 mac_hi)
__be16 mac_hi_be = cpu_to_be16(mac_hi);
u32 vf_offset, mac_hi, rate;
mac_hi = readl(app->pf->vfcfg_tbl2 + vf_offset);
put_unaligned_be32(mac_hi, &ivi->mac[0]);
uint32_t crbaddr, mac_hi, mac_lo;
mac_hi = NXRD32(adapter, crbaddr+4);
*mac = le64_to_cpu((mac_lo >> 16) | ((u64)mac_hi << 16));
*mac = le64_to_cpu((u64)mac_lo | ((u64)mac_hi << 32));
u32 mac_hi, mac_lo;
mac_hi = addr[2] | ((u32)addr[3] << 8) |
if (NXWR32(adapter, reg_lo, mac_lo) || NXWR32(adapter, reg_hi, mac_hi))
if (NXWR32(adapter, reg_lo, mac_lo) || NXWR32(adapter, reg_hi, mac_hi))
u32 mac_hi = (dev_addr[0] << 0) | (dev_addr[1] << 8) |
writel(mac_hi, slave->port_base + AM65_CPSW_PORTN_REG_SA_H);
u32 mac_lo, mac_hi, offset;
regmap_read(syscon, offset + 4, &mac_hi);
mac_addr[0] = (mac_hi >> 8) & 0xff;
mac_addr[1] = mac_hi & 0xff;
slave_write(slave, mac_hi(priv->mac_addr), SA_HI);
writel(mac_hi(ndev->dev_addr), GBE_REG_ADDR(slave, port_regs, sa_hi));