ma35d1_reg_clk_pll
EXPORT_SYMBOL_GPL(ma35d1_reg_clk_pll);
hws[CAPLL] = ma35d1_reg_clk_pll(dev, CAPLL, pllmode[0], "capll",
hws[DDRPLL] = ma35d1_reg_clk_pll(dev, DDRPLL, pllmode[1], "ddrpll",
hws[APLL] = ma35d1_reg_clk_pll(dev, APLL, pllmode[2], "apll",
hws[EPLL] = ma35d1_reg_clk_pll(dev, EPLL, pllmode[3], "epll",
hws[VPLL] = ma35d1_reg_clk_pll(dev, VPLL, pllmode[4], "vpll",
struct clk_hw *ma35d1_reg_clk_pll(struct device *dev, u32 id, u8 u8mode, const char *name,