CLK_MOUT_VPLLSRC
MUX(CLK_MOUT_VPLLSRC, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP1, 0, 1),
if (clk_hw_get_rate(hws[CLK_MOUT_VPLLSRC]) == 24000000)
MUX(CLK_MOUT_VPLLSRC, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP1, 0, 1),
#define CLKS_NR (CLK_MOUT_VPLLSRC + 1)
MUX(CLK_MOUT_VPLLSRC, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP2, 0, 1),
if (clk_hw_get_rate(hws[CLK_MOUT_VPLLSRC]) == 24 * MHZ)