lsdc_wreg32
lsdc_wreg32(ldev, LSDC_CRTC1_CFG_REG, val | CFG_OUTPUT_ENABLE);
lsdc_wreg32(ldev, LSDC_CRTC0_HDISPLAY_REG,
lsdc_wreg32(ldev, LSDC_CRTC0_VDISPLAY_REG,
lsdc_wreg32(ldev, LSDC_CRTC0_HSYNC_REG,
lsdc_wreg32(ldev, LSDC_CRTC0_VSYNC_REG,
lsdc_wreg32(ldev, LSDC_CRTC1_HDISPLAY_REG,
lsdc_wreg32(ldev, LSDC_CRTC1_VDISPLAY_REG,
lsdc_wreg32(ldev, LSDC_CRTC1_HSYNC_REG,
lsdc_wreg32(ldev, LSDC_CRTC1_VSYNC_REG,
lsdc_wreg32(ldev, LSDC_CRTC0_CFG_REG, CFG_RESET_N | LSDC_PF_XRGB8888);
lsdc_wreg32(ldev, LSDC_CRTC1_CFG_REG, CFG_RESET_N | LSDC_PF_XRGB8888);
lsdc_wreg32(ldev, LSDC_CRTC0_CFG_REG, val);
lsdc_wreg32(ldev, LSDC_CRTC1_CFG_REG, val);
lsdc_wreg32(ldev, LSDC_CRTC0_CFG_REG, val);
lsdc_wreg32(ldev, LSDC_CRTC0_CFG_REG, val);
lsdc_wreg32(ldev, LSDC_CRTC1_CFG_REG, val);
lsdc_wreg32(ldev, LSDC_CRTC1_CFG_REG, val);
lsdc_wreg32(ldev, LSDC_CRTC0_CFG_REG, val | CFG_OUTPUT_ENABLE);
lsdc_wreg32(ldev, LSDC_INT_REG, val);
lsdc_wreg32(ldev, LSDC_INT_REG, val);
lsdc_wreg32(ldev, LSDC_CRTC0_DVO_CONF_REG,
lsdc_wreg32(ldev, LSDC_CRTC1_DVO_CONF_REG,
lsdc_wreg32(ldev, LSDC_CRTC0_DVO_CONF_REG, val);
lsdc_wreg32(ldev, LSDC_HDMI0_INTF_CTRL_REG, val);
lsdc_wreg32(ldev, LSDC_HDMI0_PHY_CTRL_REG, HDMI_PHY_RESET_N);
lsdc_wreg32(ldev, LSDC_CRTC1_DVO_CONF_REG, val);
lsdc_wreg32(ldev, LSDC_HDMI1_INTF_CTRL_REG, val);
lsdc_wreg32(ldev, LSDC_HDMI1_PHY_CTRL_REG, HDMI_PHY_RESET_N);
lsdc_wreg32(ldev, LSDC_CRTC0_FB1_ADDR_LO_REG, lo);
lsdc_wreg32(ldev, LSDC_CRTC0_FB1_ADDR_HI_REG, hi);
lsdc_wreg32(ldev, LSDC_CRTC0_FB0_ADDR_LO_REG, lo);
lsdc_wreg32(ldev, LSDC_CRTC0_FB0_ADDR_HI_REG, hi);
lsdc_wreg32(ldev, LSDC_CRTC0_STRIDE_REG, stride);
lsdc_wreg32(ldev, LSDC_CRTC0_CFG_REG, status);
lsdc_wreg32(ldev, LSDC_CRTC1_FB1_ADDR_LO_REG, lo);
lsdc_wreg32(ldev, LSDC_CRTC1_FB1_ADDR_HI_REG, hi);
lsdc_wreg32(ldev, LSDC_CRTC1_FB0_ADDR_LO_REG, lo);
lsdc_wreg32(ldev, LSDC_CRTC1_FB0_ADDR_HI_REG, hi);
lsdc_wreg32(ldev, LSDC_CRTC1_STRIDE_REG, stride);
lsdc_wreg32(ldev, LSDC_CRTC1_CFG_REG, status);
lsdc_wreg32(ldev, LSDC_CURSOR0_ADDR_HI_REG, (addr >> 32) & 0xFF);
lsdc_wreg32(ldev, LSDC_CURSOR0_ADDR_LO_REG, addr);
lsdc_wreg32(ldev, LSDC_CURSOR0_POSITION_REG, (y << 16) | x);
lsdc_wreg32(ldev, LSDC_CURSOR0_CFG_REG, cfg);
lsdc_wreg32(ldev, LSDC_CURSOR1_ADDR_HI_REG, (addr >> 32) & 0xFF);
lsdc_wreg32(ldev, LSDC_CURSOR1_ADDR_LO_REG, addr);
lsdc_wreg32(ldev, LSDC_CURSOR1_POSITION_REG, (y << 16) | x);
lsdc_wreg32(ldev, LSDC_CURSOR1_CFG_REG, cfg);
lsdc_wreg32(ldev, LSDC_CURSOR0_ADDR_HI_REG, (addr >> 32) & 0xFF);
lsdc_wreg32(ldev, LSDC_CURSOR0_ADDR_LO_REG, addr);
lsdc_wreg32(ldev, LSDC_CURSOR0_POSITION_REG, (y << 16) | x);
lsdc_wreg32(ldev, LSDC_CURSOR0_CFG_REG, cfg);