drivers/clk/mxs/clk-imx23.c

150

clks[lcdif] = mxs_clk_gate("lcdif", "lcdif_div", PIX, 31);

drivers/clk/mxs/clk-imx28.c

222

clks[lcdif] = mxs_clk_gate("lcdif", "lcdif_div", LCDIF, 31);

drivers/gpu/drm/mxsfb/lcdif_drv.c

110

struct lcdif_drm_private *lcdif = drm->dev_private;

drivers/gpu/drm/mxsfb/lcdif_drv.c

113

stat = readl(lcdif->base + LCDC_V8_INT_STATUS_D0);

drivers/gpu/drm/mxsfb/lcdif_drv.c

118

reg = readl(lcdif->base + LCDC_V8_CTRLDESCL0_5);

drivers/gpu/drm/mxsfb/lcdif_drv.c

120

drm_crtc_handle_vblank(&lcdif->crtc);

drivers/gpu/drm/mxsfb/lcdif_drv.c

123

writel(stat, lcdif->base + LCDC_V8_INT_STATUS_D0);

drivers/gpu/drm/mxsfb/lcdif_drv.c

131

struct lcdif_drm_private *lcdif;

drivers/gpu/drm/mxsfb/lcdif_drv.c

134

lcdif = devm_kzalloc(&pdev->dev, sizeof(*lcdif), GFP_KERNEL);

drivers/gpu/drm/mxsfb/lcdif_drv.c

135

if (!lcdif)

drivers/gpu/drm/mxsfb/lcdif_drv.c

138

lcdif->drm = drm;

drivers/gpu/drm/mxsfb/lcdif_drv.c

139

drm->dev_private = lcdif;

drivers/gpu/drm/mxsfb/lcdif_drv.c

141

lcdif->base = devm_platform_ioremap_resource(pdev, 0);

drivers/gpu/drm/mxsfb/lcdif_drv.c

142

if (IS_ERR(lcdif->base))

drivers/gpu/drm/mxsfb/lcdif_drv.c

143

return PTR_ERR(lcdif->base);

drivers/gpu/drm/mxsfb/lcdif_drv.c

145

lcdif->clk = devm_clk_get(drm->dev, "pix");

drivers/gpu/drm/mxsfb/lcdif_drv.c

146

if (IS_ERR(lcdif->clk))

drivers/gpu/drm/mxsfb/lcdif_drv.c

147

return dev_err_probe(drm->dev, PTR_ERR(lcdif->clk), "Failed to get pix clock\n");

drivers/gpu/drm/mxsfb/lcdif_drv.c

149

lcdif->clk_axi = devm_clk_get(drm->dev, "axi");

drivers/gpu/drm/mxsfb/lcdif_drv.c

150

if (IS_ERR(lcdif->clk_axi))

drivers/gpu/drm/mxsfb/lcdif_drv.c

151

return dev_err_probe(drm->dev, PTR_ERR(lcdif->clk_axi),

drivers/gpu/drm/mxsfb/lcdif_drv.c

154

lcdif->clk_disp_axi = devm_clk_get(drm->dev, "disp_axi");

drivers/gpu/drm/mxsfb/lcdif_drv.c

155

if (IS_ERR(lcdif->clk_disp_axi))

drivers/gpu/drm/mxsfb/lcdif_drv.c

156

return dev_err_probe(drm->dev, PTR_ERR(lcdif->clk_disp_axi),

drivers/gpu/drm/mxsfb/lcdif_drv.c

172

ret = lcdif_kms_init(lcdif);

drivers/gpu/drm/mxsfb/lcdif_drv.c

185

drm_crtc_vblank_off(&lcdif->crtc);

drivers/gpu/drm/mxsfb/lcdif_drv.c

187

ret = lcdif_attach_bridge(lcdif);

drivers/gpu/drm/mxsfb/lcdif_drv.c

203

lcdif->irq = ret;

drivers/gpu/drm/mxsfb/lcdif_drv.c

205

ret = devm_request_irq(drm->dev, lcdif->irq, lcdif_irq_handler, 0,

drivers/gpu/drm/mxsfb/lcdif_drv.c

223

struct lcdif_drm_private *lcdif = drm->dev_private;

drivers/gpu/drm/mxsfb/lcdif_drv.c

227

drm_crtc_vblank_off(&lcdif->crtc);

drivers/gpu/drm/mxsfb/lcdif_drv.c

306

struct lcdif_drm_private *lcdif = drm->dev_private;

drivers/gpu/drm/mxsfb/lcdif_drv.c

309

clk_disable_unprepare(lcdif->clk);

drivers/gpu/drm/mxsfb/lcdif_drv.c

311

clk_disable_unprepare(lcdif->clk_disp_axi);

drivers/gpu/drm/mxsfb/lcdif_drv.c

313

clk_disable_unprepare(lcdif->clk_axi);

drivers/gpu/drm/mxsfb/lcdif_drv.c

321

struct lcdif_drm_private *lcdif = drm->dev_private;

drivers/gpu/drm/mxsfb/lcdif_drv.c

324

clk_prepare_enable(lcdif->clk_axi);

drivers/gpu/drm/mxsfb/lcdif_drv.c

326

clk_prepare_enable(lcdif->clk_disp_axi);

drivers/gpu/drm/mxsfb/lcdif_drv.c

328

clk_prepare_enable(lcdif->clk);

drivers/gpu/drm/mxsfb/lcdif_drv.c

50

static int lcdif_attach_bridge(struct lcdif_drm_private *lcdif)

drivers/gpu/drm/mxsfb/lcdif_drv.c

52

struct device *dev = lcdif->drm->dev;

drivers/gpu/drm/mxsfb/lcdif_drv.c

83

encoder->possible_crtcs = drm_crtc_mask(&lcdif->crtc);

drivers/gpu/drm/mxsfb/lcdif_drv.c

84

ret = drm_encoder_init(lcdif->drm, encoder, &lcdif_encoder_funcs,

drivers/gpu/drm/mxsfb/lcdif_drv.c

97

connector = drm_bridge_connector_init(lcdif->drm, encoder);

drivers/gpu/drm/mxsfb/lcdif_drv.h

40

int lcdif_kms_init(struct lcdif_drm_private *lcdif);

drivers/gpu/drm/mxsfb/lcdif_kms.c

162

static void lcdif_set_formats(struct lcdif_drm_private *lcdif,

drivers/gpu/drm/mxsfb/lcdif_kms.c

166

struct drm_device *drm = lcdif->drm;

drivers/gpu/drm/mxsfb/lcdif_kms.c

174

lcdif->base + LCDC_V8_DISP_PARA);

drivers/gpu/drm/mxsfb/lcdif_kms.c

178

lcdif->base + LCDC_V8_DISP_PARA);

drivers/gpu/drm/mxsfb/lcdif_kms.c

182

lcdif->base + LCDC_V8_DISP_PARA);

drivers/gpu/drm/mxsfb/lcdif_kms.c

194

lcdif->base + LCDC_V8_CTRLDESCL0_5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

198

lcdif->base + LCDC_V8_CTRLDESCL0_5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

202

lcdif->base + LCDC_V8_CTRLDESCL0_5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

206

lcdif->base + LCDC_V8_CTRLDESCL0_5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

210

lcdif->base + LCDC_V8_CTRLDESCL0_5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

214

lcdif->base + LCDC_V8_CTRLDESCL0_5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

220

lcdif->base + LCDC_V8_CTRLDESCL0_5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

225

lcdif->base + LCDC_V8_CTRLDESCL0_5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

230

lcdif->base + LCDC_V8_CTRLDESCL0_5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

235

lcdif->base + LCDC_V8_CTRLDESCL0_5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

254

lcdif->base + LCDC_V8_CSC0_CTRL);

drivers/gpu/drm/mxsfb/lcdif_kms.c

264

lcdif->base + LCDC_V8_CSC0_COEF0);

drivers/gpu/drm/mxsfb/lcdif_kms.c

266

lcdif->base + LCDC_V8_CSC0_COEF1);

drivers/gpu/drm/mxsfb/lcdif_kms.c

268

lcdif->base + LCDC_V8_CSC0_COEF2);

drivers/gpu/drm/mxsfb/lcdif_kms.c

270

lcdif->base + LCDC_V8_CSC0_COEF3);

drivers/gpu/drm/mxsfb/lcdif_kms.c

272

lcdif->base + LCDC_V8_CSC0_COEF4);

drivers/gpu/drm/mxsfb/lcdif_kms.c

274

lcdif->base + LCDC_V8_CSC0_COEF5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

282

lcdif->base + LCDC_V8_CSC0_CTRL);

drivers/gpu/drm/mxsfb/lcdif_kms.c

284

writel(coeffs[0], lcdif->base + LCDC_V8_CSC0_COEF0);

drivers/gpu/drm/mxsfb/lcdif_kms.c

285

writel(coeffs[1], lcdif->base + LCDC_V8_CSC0_COEF1);

drivers/gpu/drm/mxsfb/lcdif_kms.c

286

writel(coeffs[2], lcdif->base + LCDC_V8_CSC0_COEF2);

drivers/gpu/drm/mxsfb/lcdif_kms.c

287

writel(coeffs[3], lcdif->base + LCDC_V8_CSC0_COEF3);

drivers/gpu/drm/mxsfb/lcdif_kms.c

288

writel(coeffs[4], lcdif->base + LCDC_V8_CSC0_COEF4);

drivers/gpu/drm/mxsfb/lcdif_kms.c

289

writel(coeffs[5], lcdif->base + LCDC_V8_CSC0_COEF5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

292

writel(CSC0_CTRL_BYPASS, lcdif->base + LCDC_V8_CSC0_CTRL);

drivers/gpu/drm/mxsfb/lcdif_kms.c

296

static void lcdif_set_mode(struct lcdif_drm_private *lcdif, u32 bus_flags)

drivers/gpu/drm/mxsfb/lcdif_kms.c

298

struct drm_display_mode *m = &lcdif->crtc.state->adjusted_mode;

drivers/gpu/drm/mxsfb/lcdif_kms.c

310

writel(ctrl, lcdif->base + LCDC_V8_CTRL);

drivers/gpu/drm/mxsfb/lcdif_kms.c

314

lcdif->base + LCDC_V8_DISP_SIZE);

drivers/gpu/drm/mxsfb/lcdif_kms.c

318

lcdif->base + LCDC_V8_HSYN_PARA);

drivers/gpu/drm/mxsfb/lcdif_kms.c

322

lcdif->base + LCDC_V8_VSYN_PARA);

drivers/gpu/drm/mxsfb/lcdif_kms.c

326

lcdif->base + LCDC_V8_VSYN_HSYN_WIDTH);

drivers/gpu/drm/mxsfb/lcdif_kms.c

330

lcdif->base + LCDC_V8_CTRLDESCL0_1);

drivers/gpu/drm/mxsfb/lcdif_kms.c

342

CTRLDESCL0_3_PITCH(lcdif->crtc.primary->state->fb->pitches[0]);

drivers/gpu/drm/mxsfb/lcdif_kms.c

343

writel(ctrl, lcdif->base + LCDC_V8_CTRLDESCL0_3);

drivers/gpu/drm/mxsfb/lcdif_kms.c

346

static void lcdif_enable_controller(struct lcdif_drm_private *lcdif)

drivers/gpu/drm/mxsfb/lcdif_kms.c

353

lcdif->base + LCDC_V8_PANIC0_THRES);

drivers/gpu/drm/mxsfb/lcdif_kms.c

360

lcdif->base + LCDC_V8_INT_ENABLE_D1);

drivers/gpu/drm/mxsfb/lcdif_kms.c

362

reg = readl(lcdif->base + LCDC_V8_DISP_PARA);

drivers/gpu/drm/mxsfb/lcdif_kms.c

364

writel(reg, lcdif->base + LCDC_V8_DISP_PARA);

drivers/gpu/drm/mxsfb/lcdif_kms.c

366

reg = readl(lcdif->base + LCDC_V8_CTRLDESCL0_5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

368

writel(reg, lcdif->base + LCDC_V8_CTRLDESCL0_5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

371

static void lcdif_disable_controller(struct lcdif_drm_private *lcdif)

drivers/gpu/drm/mxsfb/lcdif_kms.c

376

reg = readl(lcdif->base + LCDC_V8_CTRLDESCL0_5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

378

writel(reg, lcdif->base + LCDC_V8_CTRLDESCL0_5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

380

ret = readl_poll_timeout(lcdif->base + LCDC_V8_CTRLDESCL0_5,

drivers/gpu/drm/mxsfb/lcdif_kms.c

384

drm_err(lcdif->drm, "Failed to disable controller!\n");

drivers/gpu/drm/mxsfb/lcdif_kms.c

386

reg = readl(lcdif->base + LCDC_V8_DISP_PARA);

drivers/gpu/drm/mxsfb/lcdif_kms.c

388

writel(reg, lcdif->base + LCDC_V8_DISP_PARA);

drivers/gpu/drm/mxsfb/lcdif_kms.c

391

writel(0, lcdif->base + LCDC_V8_INT_ENABLE_D1);

drivers/gpu/drm/mxsfb/lcdif_kms.c

394

static void lcdif_reset_block(struct lcdif_drm_private *lcdif)

drivers/gpu/drm/mxsfb/lcdif_kms.c

396

writel(CTRL_SW_RESET, lcdif->base + LCDC_V8_CTRL + REG_SET);

drivers/gpu/drm/mxsfb/lcdif_kms.c

397

readl(lcdif->base + LCDC_V8_CTRL);

drivers/gpu/drm/mxsfb/lcdif_kms.c

398

writel(CTRL_SW_RESET, lcdif->base + LCDC_V8_CTRL + REG_CLR);

drivers/gpu/drm/mxsfb/lcdif_kms.c

399

readl(lcdif->base + LCDC_V8_CTRL);

drivers/gpu/drm/mxsfb/lcdif_kms.c

407

struct lcdif_drm_private *lcdif = to_lcdif_drm_private(drm);

drivers/gpu/drm/mxsfb/lcdif_kms.c

411

m->clock, (int)(clk_get_rate(lcdif->clk) / 1000));

drivers/gpu/drm/mxsfb/lcdif_kms.c

417

lcdif_reset_block(lcdif);

drivers/gpu/drm/mxsfb/lcdif_kms.c

419

lcdif_set_formats(lcdif, plane_state, lcdif_crtc_state->bus_format);

drivers/gpu/drm/mxsfb/lcdif_kms.c

421

lcdif_set_mode(lcdif, lcdif_crtc_state->bus_flags);

drivers/gpu/drm/mxsfb/lcdif_kms.c

508

struct lcdif_drm_private *lcdif = to_lcdif_drm_private(crtc->dev);

drivers/gpu/drm/mxsfb/lcdif_kms.c

512

reg = readl(lcdif->base + LCDC_V8_CTRLDESCL0_5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

514

writel(reg, lcdif->base + LCDC_V8_CTRLDESCL0_5);

drivers/gpu/drm/mxsfb/lcdif_kms.c

533

struct lcdif_drm_private *lcdif = to_lcdif_drm_private(crtc->dev);

drivers/gpu/drm/mxsfb/lcdif_kms.c

537

struct drm_display_mode *m = &lcdif->crtc.state->adjusted_mode;

drivers/gpu/drm/mxsfb/lcdif_kms.c

538

struct drm_device *drm = lcdif->drm;

drivers/gpu/drm/mxsfb/lcdif_kms.c

541

clk_set_rate(lcdif->clk, m->clock * 1000);

drivers/gpu/drm/mxsfb/lcdif_kms.c

551

lcdif->base + LCDC_V8_CTRLDESCL_LOW0_4);

drivers/gpu/drm/mxsfb/lcdif_kms.c

553

lcdif->base + LCDC_V8_CTRLDESCL_HIGH0_4);

drivers/gpu/drm/mxsfb/lcdif_kms.c

555

lcdif_enable_controller(lcdif);

drivers/gpu/drm/mxsfb/lcdif_kms.c

563

struct lcdif_drm_private *lcdif = to_lcdif_drm_private(crtc->dev);

drivers/gpu/drm/mxsfb/lcdif_kms.c

564

struct drm_device *drm = lcdif->drm;

drivers/gpu/drm/mxsfb/lcdif_kms.c

569

lcdif_disable_controller(lcdif);

drivers/gpu/drm/mxsfb/lcdif_kms.c

626

struct lcdif_drm_private *lcdif = to_lcdif_drm_private(crtc->dev);

drivers/gpu/drm/mxsfb/lcdif_kms.c

629

writel(INT_STATUS_D0_VS_BLANK, lcdif->base + LCDC_V8_INT_STATUS_D0);

drivers/gpu/drm/mxsfb/lcdif_kms.c

630

writel(INT_ENABLE_D0_VS_BLANK_EN, lcdif->base + LCDC_V8_INT_ENABLE_D0);

drivers/gpu/drm/mxsfb/lcdif_kms.c

637

struct lcdif_drm_private *lcdif = to_lcdif_drm_private(crtc->dev);

drivers/gpu/drm/mxsfb/lcdif_kms.c

640

writel(0, lcdif->base + LCDC_V8_INT_ENABLE_D0);

drivers/gpu/drm/mxsfb/lcdif_kms.c

641

writel(INT_STATUS_D0_VS_BLANK, lcdif->base + LCDC_V8_INT_STATUS_D0);

drivers/gpu/drm/mxsfb/lcdif_kms.c

671

struct lcdif_drm_private *lcdif = to_lcdif_drm_private(plane->dev);

drivers/gpu/drm/mxsfb/lcdif_kms.c

675

&lcdif->crtc);

drivers/gpu/drm/mxsfb/lcdif_kms.c

686

struct lcdif_drm_private *lcdif = to_lcdif_drm_private(plane->dev);

drivers/gpu/drm/mxsfb/lcdif_kms.c

694

lcdif->base + LCDC_V8_CTRLDESCL_LOW0_4);

drivers/gpu/drm/mxsfb/lcdif_kms.c

696

lcdif->base + LCDC_V8_CTRLDESCL_HIGH0_4);

drivers/gpu/drm/mxsfb/lcdif_kms.c

747

int lcdif_kms_init(struct lcdif_drm_private *lcdif)

drivers/gpu/drm/mxsfb/lcdif_kms.c

754

struct drm_crtc *crtc = &lcdif->crtc;

drivers/gpu/drm/mxsfb/lcdif_kms.c

757

drm_plane_helper_add(&lcdif->planes.primary,

drivers/gpu/drm/mxsfb/lcdif_kms.c

759

ret = drm_universal_plane_init(lcdif->drm, &lcdif->planes.primary, 1,

drivers/gpu/drm/mxsfb/lcdif_kms.c

768

ret = drm_plane_create_color_properties(&lcdif->planes.primary,

drivers/gpu/drm/mxsfb/lcdif_kms.c

777

return drm_crtc_init_with_planes(lcdif->drm, crtc,

drivers/gpu/drm/mxsfb/lcdif_kms.c

778

&lcdif->planes.primary, NULL,