lantiq_ssc_writel
lantiq_ssc_writel(spi, 0, LTQ_SPI_IRNEN);
lantiq_ssc_writel(spi, 0, LTQ_SPI_CLC);
lantiq_ssc_writel(spi, val, LTQ_SPI_RXFCON);
lantiq_ssc_writel(spi, val, LTQ_SPI_TXFCON);
lantiq_ssc_writel(spi, LTQ_SPI_WHBSTATE_CLREN, LTQ_SPI_WHBSTATE);
lantiq_ssc_writel(spi, LTQ_SPI_WHBSTATE_SETEN, LTQ_SPI_WHBSTATE);
lantiq_ssc_writel(spi, brt, LTQ_SPI_BRT);
lantiq_ssc_writel(spi, 1 << LTQ_SPI_CLC_RMC_S, LTQ_SPI_CLC);
lantiq_ssc_writel(spi, LTQ_SPI_CON_RUEN | LTQ_SPI_CON_AEN |
lantiq_ssc_writel(spi, LTQ_SPI_WHBSTATE_SETMS |
lantiq_ssc_writel(spi, 0, LTQ_SPI_GPOCON);
lantiq_ssc_writel(spi, 0xFF00, LTQ_SPI_FPGO);
lantiq_ssc_writel(spi, hwcfg->irnen_t | hwcfg->irnen_r |
lantiq_ssc_writel(spi, con, LTQ_SPI_CON);
lantiq_ssc_writel(spi, data, LTQ_SPI_TB);
lantiq_ssc_writel(spi, rxreq, LTQ_SPI_RXREQ);
lantiq_ssc_writel(spi, val, hwcfg->irncr);
lantiq_ssc_writel(spi, val, hwcfg->irncr);
lantiq_ssc_writel(spi, fgpo, LTQ_SPI_FPGO);