drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1883

union lane_count_set lane_count;

drivers/gpu/drm/amd/display/dc/link/link_detection.c

524

union lane_count_set lane_count_set = {0};

drivers/gpu/drm/amd/display/dc/link/link_detection.c

536

&lane_count_set.raw,

drivers/gpu/drm/amd/display/dc/link/link_detection.c

537

sizeof(lane_count_set));

drivers/gpu/drm/amd/display/dc/link/link_detection.c

545

lane_count_set.bits.LANE_COUNT_SET;

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1102

union lane_count_set lane_count_set = {0};

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1107

lane_count_set.bits.LANE_COUNT_SET =

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1110

lane_count_set.bits.ENHANCED_FRAMING = lt_settings->enhanced_framing;

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1111

lane_count_set.bits.POST_LT_ADJ_REQ_GRANTED = 0;

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1116

lane_count_set.bits.POST_LT_ADJ_REQ_GRANTED =

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1126

&lane_count_set.raw, 1);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1516

union lane_count_set lane_count_set = {0};

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1543

lane_count_set.bits.LANE_COUNT_SET = lt_settings->link_settings.lane_count;

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1544

lane_count_set.bits.ENHANCED_FRAMING = lt_settings->enhanced_framing;

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1545

lane_count_set.bits.POST_LT_ADJ_REQ_GRANTED = 0;

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1550

&lane_count_set.raw,

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1551

sizeof(lane_count_set));

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c

214

union lane_count_set lane_count_set = {0};

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c

253

lane_count_set.bits.LANE_COUNT_SET =

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c

256

lane_count_set.bits.ENHANCED_FRAMING = lt_settings->enhanced_framing;

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c

257

lane_count_set.bits.POST_LT_ADJ_REQ_GRANTED = 0;

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c

261

lane_count_set.bits.POST_LT_ADJ_REQ_GRANTED =

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c

269

&lane_count_set.raw, 1);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

352

union lane_count_set lane_count_set = {0};

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

375

&lane_count_set.raw, sizeof(lane_count_set));

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

385

lane_count_set.bits.LANE_COUNT_SET != link_setting.lane_count) {