arch/mips/include/uapi/asm/inst.h

1158

struct loongson3_lsdc2_format loongson3_lsdc2_format;

arch/mips/kvm/emulate.c

1193

rt = inst.loongson3_lsdc2_format.rt;

arch/mips/kvm/emulate.c

1194

switch (inst.loongson3_lsdc2_format.opcode1) {

arch/mips/kvm/emulate.c

1453

rt = inst.loongson3_lsdc2_format.rt;

arch/mips/kvm/emulate.c

1454

switch (inst.loongson3_lsdc2_format.opcode1) {

arch/mips/loongson64/cop2-ex.c

149

switch (insn.loongson3_lsdc2_format.opcode1) {

arch/mips/loongson64/cop2-ex.c

168

regs->regs[insn.loongson3_lsdc2_format.rt] = value;

arch/mips/loongson64/cop2-ex.c

179

regs->regs[insn.loongson3_lsdc2_format.rt] = value;

arch/mips/loongson64/cop2-ex.c

190

regs->regs[insn.loongson3_lsdc2_format.rt] = value;

arch/mips/loongson64/cop2-ex.c

203

set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0, value);

arch/mips/loongson64/cop2-ex.c

219

set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0, value);

arch/mips/loongson64/cop2-ex.c

228

switch (insn.loongson3_lsdc2_format.opcode1) {

arch/mips/loongson64/cop2-ex.c

243

value = regs->regs[insn.loongson3_lsdc2_format.rt];

arch/mips/loongson64/cop2-ex.c

255

value = regs->regs[insn.loongson3_lsdc2_format.rt];

arch/mips/loongson64/cop2-ex.c

267

value = regs->regs[insn.loongson3_lsdc2_format.rt];

arch/mips/loongson64/cop2-ex.c

283

value = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0);

arch/mips/loongson64/cop2-ex.c

301

value = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0);