arch/arm64/include/asm/hyp_image.h

61

#define KVM_NVHE_ALIAS(sym) kvm_nvhe_sym(sym) = sym;

arch/arm64/include/asm/hyp_image.h

64

#define KVM_NVHE_ALIAS_HYP(first, sec) kvm_nvhe_sym(first) = kvm_nvhe_sym(sec);

arch/arm64/include/asm/kvm_asm.h

122

#define DECLARE_KVM_NVHE_SYM(sym) extern char kvm_nvhe_sym(sym)[]

arch/arm64/include/asm/kvm_asm.h

135

DECLARE_PER_CPU(type, kvm_nvhe_sym(sym))

arch/arm64/include/asm/kvm_asm.h

149

base = kvm_nvhe_sym(kvm_arm_hyp_percpu_base)[cpu]; \

arch/arm64/include/asm/kvm_asm.h

203

#define CHOOSE_NVHE_SYM(sym) kvm_nvhe_sym(sym)

arch/arm64/include/asm/kvm_asm.h

244

#define kvm_ksym_ref_nvhe(sym) kvm_ksym_ref(kvm_nvhe_sym(sym))

arch/arm64/include/asm/kvm_asm.h

255

extern unsigned long kvm_nvhe_sym(kvm_arm_hyp_percpu_base)[];

arch/arm64/include/asm/kvm_host.h

702

extern struct fgt_masks kvm_nvhe_sym(hfgrtr_masks);

arch/arm64/include/asm/kvm_host.h

703

extern struct fgt_masks kvm_nvhe_sym(hfgwtr_masks);

arch/arm64/include/asm/kvm_host.h

704

extern struct fgt_masks kvm_nvhe_sym(hfgitr_masks);

arch/arm64/include/asm/kvm_host.h

705

extern struct fgt_masks kvm_nvhe_sym(hdfgrtr_masks);

arch/arm64/include/asm/kvm_host.h

706

extern struct fgt_masks kvm_nvhe_sym(hdfgwtr_masks);

arch/arm64/include/asm/kvm_host.h

707

extern struct fgt_masks kvm_nvhe_sym(hafgrtr_masks);

arch/arm64/include/asm/kvm_host.h

708

extern struct fgt_masks kvm_nvhe_sym(hfgrtr2_masks);

arch/arm64/include/asm/kvm_host.h

709

extern struct fgt_masks kvm_nvhe_sym(hfgwtr2_masks);

arch/arm64/include/asm/kvm_host.h

710

extern struct fgt_masks kvm_nvhe_sym(hfgitr2_masks);

arch/arm64/include/asm/kvm_host.h

711

extern struct fgt_masks kvm_nvhe_sym(hdfgrtr2_masks);

arch/arm64/include/asm/kvm_host.h

712

extern struct fgt_masks kvm_nvhe_sym(hdfgwtr2_masks);

arch/arm64/include/asm/kvm_host.h

713

extern struct fgt_masks kvm_nvhe_sym(ich_hfgrtr_masks);

arch/arm64/include/asm/kvm_host.h

714

extern struct fgt_masks kvm_nvhe_sym(ich_hfgwtr_masks);

arch/arm64/include/asm/kvm_host.h

715

extern struct fgt_masks kvm_nvhe_sym(ich_hfgitr_masks);

arch/arm64/include/asm/kvm_host.h

825

extern struct kvm_host_psci_config kvm_nvhe_sym(kvm_host_psci_config);

arch/arm64/include/asm/kvm_host.h

828

extern s64 kvm_nvhe_sym(hyp_physvirt_offset);

arch/arm64/include/asm/kvm_host.h

831

extern u64 kvm_nvhe_sym(hyp_cpu_logical_map)[NR_CPUS];

arch/arm64/include/asm/kvm_hyp.h

140

extern u64 kvm_nvhe_sym(id_aa64pfr0_el1_sys_val);

arch/arm64/include/asm/kvm_hyp.h

141

extern u64 kvm_nvhe_sym(id_aa64pfr1_el1_sys_val);

arch/arm64/include/asm/kvm_hyp.h

142

extern u64 kvm_nvhe_sym(id_aa64pfr2_el1_sys_val);

arch/arm64/include/asm/kvm_hyp.h

143

extern u64 kvm_nvhe_sym(id_aa64isar0_el1_sys_val);

arch/arm64/include/asm/kvm_hyp.h

144

extern u64 kvm_nvhe_sym(id_aa64isar1_el1_sys_val);

arch/arm64/include/asm/kvm_hyp.h

145

extern u64 kvm_nvhe_sym(id_aa64isar2_el1_sys_val);

arch/arm64/include/asm/kvm_hyp.h

146

extern u64 kvm_nvhe_sym(id_aa64mmfr0_el1_sys_val);

arch/arm64/include/asm/kvm_hyp.h

147

extern u64 kvm_nvhe_sym(id_aa64mmfr1_el1_sys_val);

arch/arm64/include/asm/kvm_hyp.h

148

extern u64 kvm_nvhe_sym(id_aa64mmfr2_el1_sys_val);

arch/arm64/include/asm/kvm_hyp.h

149

extern u64 kvm_nvhe_sym(id_aa64smfr0_el1_sys_val);

arch/arm64/include/asm/kvm_hyp.h

151

extern unsigned long kvm_nvhe_sym(__icache_flags);

arch/arm64/include/asm/kvm_hyp.h

152

extern unsigned int kvm_nvhe_sym(kvm_arm_vmid_bits);

arch/arm64/include/asm/kvm_hyp.h

153

extern unsigned int kvm_nvhe_sym(kvm_host_sve_max_vl);

arch/arm64/include/asm/kvm_hyp.h

154

extern unsigned long kvm_nvhe_sym(hyp_nr_cpus);

arch/arm64/include/asm/kvm_hyp.h

155

extern unsigned int kvm_nvhe_sym(hyp_gicv3_nr_lr);

arch/arm64/include/asm/kvm_pkvm.h

125

for (i = 0; i < kvm_nvhe_sym(hyp_memblock_nr); i++) {

arch/arm64/include/asm/kvm_pkvm.h

126

struct memblock_region *reg = &kvm_nvhe_sym(hyp_memory)[i];

arch/arm64/include/asm/kvm_pkvm.h

72

extern struct memblock_region kvm_nvhe_sym(hyp_memory)[];

arch/arm64/include/asm/kvm_pkvm.h

73

extern unsigned int kvm_nvhe_sym(hyp_memblock_nr);

arch/arm64/include/asm/kvm_pkvm.h

93

for (i = 0; i < kvm_nvhe_sym(hyp_memblock_nr); i++) {

arch/arm64/include/asm/kvm_pkvm.h

94

res += hyp_vmemmap_memblock_size(&kvm_nvhe_sym(hyp_memory)[i],

arch/arm64/kvm/arm.c

2458

kvm_nvhe_sym(hyp_gicv3_nr_lr) = kvm_vgic_global_state.nr_lr;

arch/arm64/kvm/arm.c

2531

if (!kvm_nvhe_sym(kvm_arm_hyp_percpu_base)[cpu])

arch/arm64/kvm/arm.c

2541

free_pages(kvm_nvhe_sym(kvm_arm_hyp_percpu_base)[cpu], nvhe_percpu_order());

arch/arm64/kvm/arm.c

2548

void *per_cpu_base = kvm_ksym_ref(kvm_nvhe_sym(kvm_arm_hyp_percpu_base));

arch/arm64/kvm/arm.c

2594

kvm_nvhe_sym(id_aa64pfr0_el1_sys_val) = get_hyp_id_aa64pfr0_el1();

arch/arm64/kvm/arm.c

2595

kvm_nvhe_sym(id_aa64pfr1_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1);

arch/arm64/kvm/arm.c

2596

kvm_nvhe_sym(id_aa64pfr2_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64PFR2_EL1);

arch/arm64/kvm/arm.c

2597

kvm_nvhe_sym(id_aa64isar0_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64ISAR0_EL1);

arch/arm64/kvm/arm.c

2598

kvm_nvhe_sym(id_aa64isar1_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64ISAR1_EL1);

arch/arm64/kvm/arm.c

2599

kvm_nvhe_sym(id_aa64isar2_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64ISAR2_EL1);

arch/arm64/kvm/arm.c

2600

kvm_nvhe_sym(id_aa64mmfr0_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1);

arch/arm64/kvm/arm.c

2601

kvm_nvhe_sym(id_aa64mmfr1_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64MMFR1_EL1);

arch/arm64/kvm/arm.c

2602

kvm_nvhe_sym(id_aa64mmfr2_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64MMFR2_EL1);

arch/arm64/kvm/arm.c

2603

kvm_nvhe_sym(id_aa64smfr0_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64SMFR0_EL1);

arch/arm64/kvm/arm.c

2604

kvm_nvhe_sym(__icache_flags) = __icache_flags;

arch/arm64/kvm/arm.c

2605

kvm_nvhe_sym(kvm_arm_vmid_bits) = kvm_arm_vmid_bits;

arch/arm64/kvm/arm.c

2608

kvm_nvhe_sym(hfgrtr_masks) = hfgrtr_masks;

arch/arm64/kvm/arm.c

2609

kvm_nvhe_sym(hfgwtr_masks) = hfgwtr_masks;

arch/arm64/kvm/arm.c

2610

kvm_nvhe_sym(hfgitr_masks) = hfgitr_masks;

arch/arm64/kvm/arm.c

2611

kvm_nvhe_sym(hdfgrtr_masks) = hdfgrtr_masks;

arch/arm64/kvm/arm.c

2612

kvm_nvhe_sym(hdfgwtr_masks) = hdfgwtr_masks;

arch/arm64/kvm/arm.c

2613

kvm_nvhe_sym(hafgrtr_masks) = hafgrtr_masks;

arch/arm64/kvm/arm.c

2614

kvm_nvhe_sym(hfgrtr2_masks) = hfgrtr2_masks;

arch/arm64/kvm/arm.c

2615

kvm_nvhe_sym(hfgwtr2_masks) = hfgwtr2_masks;

arch/arm64/kvm/arm.c

2616

kvm_nvhe_sym(hfgitr2_masks) = hfgitr2_masks;

arch/arm64/kvm/arm.c

2617

kvm_nvhe_sym(hdfgrtr2_masks)= hdfgrtr2_masks;

arch/arm64/kvm/arm.c

2618

kvm_nvhe_sym(hdfgwtr2_masks)= hdfgwtr2_masks;

arch/arm64/kvm/arm.c

2619

kvm_nvhe_sym(ich_hfgrtr_masks) = ich_hfgrtr_masks;

arch/arm64/kvm/arm.c

2620

kvm_nvhe_sym(ich_hfgwtr_masks) = ich_hfgwtr_masks;

arch/arm64/kvm/arm.c

2621

kvm_nvhe_sym(ich_hfgitr_masks) = ich_hfgitr_masks;

arch/arm64/kvm/arm.c

2780

kvm_nvhe_sym(kvm_arm_hyp_percpu_base)[cpu] = (unsigned long)page_addr;

arch/arm64/kvm/arm.c

2783

kvm_nvhe_sym(hyp_nr_cpus) = num_possible_cpus();

arch/arm64/kvm/arm.c

2858

char *percpu_begin = (char *)kvm_nvhe_sym(kvm_arm_hyp_percpu_base)[cpu];

arch/arm64/kvm/pkvm.c

21

static struct memblock_region *hyp_memory = kvm_nvhe_sym(hyp_memory);

arch/arm64/kvm/pkvm.c

22

static unsigned int *hyp_memblock_nr_ptr = &kvm_nvhe_sym(hyp_memblock_nr);

arch/arm64/kvm/reset.c

56

kvm_nvhe_sym(kvm_host_sve_max_vl) = kvm_host_sve_max_vl;

arch/arm64/kvm/stacktrace.c

223

i < ARRAY_SIZE(kvm_nvhe_sym(pkvm_stacktrace)) && stacktrace[i];