arch/arm64/include/asm/kvm_emulate.h

672

if (kvm_has_feat(kvm, ID_AA64ISAR2_EL1, MOPS, IMP))

arch/arm64/include/asm/kvm_emulate.h

684

if (kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64))

arch/arm64/include/asm/kvm_emulate.h

687

if (kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_V))

arch/arm64/include/asm/kvm_host.h

1621

pa = kvm_has_feat((k), ID_AA64ISAR1_EL1, APA, l); \

arch/arm64/include/asm/kvm_host.h

1622

pa &= kvm_has_feat((k), ID_AA64ISAR1_EL1, GPA, IMP); \

arch/arm64/include/asm/kvm_host.h

1623

pi = kvm_has_feat((k), ID_AA64ISAR1_EL1, API, l); \

arch/arm64/include/asm/kvm_host.h

1624

pi &= kvm_has_feat((k), ID_AA64ISAR1_EL1, GPI, IMP); \

arch/arm64/include/asm/kvm_host.h

1625

pa3 = kvm_has_feat((k), ID_AA64ISAR2_EL1, APA3, l); \

arch/arm64/include/asm/kvm_host.h

1626

pa3 &= kvm_has_feat((k), ID_AA64ISAR2_EL1, GPA3, IMP); \

arch/arm64/include/asm/kvm_host.h

1633

kvm_has_feat((k), ID_AA64PFR2_EL1, FPMR, IMP))

arch/arm64/include/asm/kvm_host.h

1636

(kvm_has_feat((k), ID_AA64MMFR3_EL1, TCRX, IMP))

arch/arm64/include/asm/kvm_host.h

1639

(kvm_has_feat((k), ID_AA64MMFR3_EL1, S1PIE, IMP))

arch/arm64/include/asm/kvm_host.h

1643

kvm_has_feat((k), ID_AA64MMFR3_EL1, S1POE, IMP))

arch/arm64/include/asm/kvm_host.h

1646

(kvm_has_feat((k), ID_AA64PFR0_EL1, RAS, IMP))

arch/arm64/include/asm/kvm_host.h

1649

(kvm_has_feat((k), ID_AA64MMFR3_EL1, SCTLRX, IMP))

arch/arm64/include/asm/kvm_nested.h

127

kvm_has_feat(kvm, ID_AA64MMFR1_EL1, XNX, IMP);

arch/arm64/include/asm/kvm_nested.h

184

kvm_has_feat(kvm, ID_AA64ISAR1_EL1, XS, IMP))))

arch/arm64/include/asm/kvm_nested.h

188

!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, OS))

arch/arm64/include/asm/kvm_nested.h

193

!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, RANGE))

arch/arm64/include/asm/kvm_nested.h

210

kvm_has_feat(kvm, ID_AA64ISAR1_EL1, XS, IMP))))

arch/arm64/include/asm/kvm_nested.h

217

!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, OS))

arch/arm64/include/asm/kvm_nested.h

222

!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, RANGE))

arch/arm64/kvm/at.c

1004

if (!kvm_has_feat(vcpu->kvm, ID_AA64MMFR1_EL1, PAN, PAN3))

arch/arm64/kvm/at.c

332

wi->hpd = kvm_has_feat(vcpu->kvm, ID_AA64MMFR1_EL1, HPDS, IMP);

arch/arm64/kvm/at.c

363

lva = kvm_has_feat(vcpu->kvm, ID_AA64MMFR2_EL1, VARange, 52);

arch/arm64/kvm/at.c

381

if (kvm_has_feat(vcpu->kvm, ID_AA64MMFR2_EL1, E0PD, IMP) &&

arch/arm64/kvm/at.c

40

if (!kvm_has_feat(vcpu->kvm, ID_AA64MMFR0_EL1, TGRAN16, 52_BIT))

arch/arm64/kvm/at.c

411

wi->ha = kvm_has_feat(vcpu->kvm, ID_AA64MMFR1_EL1, HAFDBS, AF);

arch/arm64/kvm/at.c

44

if (!kvm_has_feat(vcpu->kvm, ID_AA64MMFR0_EL1, TGRAN4, 52_BIT))

arch/arm64/kvm/at.c

876

if (!kvm_has_feat(vcpu->kvm, ID_AA64PFR2_EL1, MTEPERM, IMP))

arch/arm64/kvm/config.c

1418

bool e2h0 = kvm_has_feat(kvm, FEAT_E2H0);

arch/arm64/kvm/config.c

231

return !kvm_has_feat(kvm, FEAT_AA64EL3);

arch/arm64/kvm/config.c

236

return ((kvm_has_feat(kvm, ID_AA64MMFR4_EL1, NV_frac, NV2_ONLY) &&

arch/arm64/kvm/config.c

238

kvm_has_feat(kvm, ID_AA64MMFR2_EL1, NV, NV2));

arch/arm64/kvm/config.c

243

return feat_nv2(kvm) && !kvm_has_feat(kvm, FEAT_E2H0);

arch/arm64/kvm/config.c

248

return (kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, V1P1) ||

arch/arm64/kvm/config.c

250

kvm_has_feat(kvm, ID_AA64PFR1_EL1, RAS_frac, RASv1p1)));

arch/arm64/kvm/config.c

255

return (kvm_has_feat(kvm, ID_AA64PFR0_EL1, CSV2, CSV2_2) ||

arch/arm64/kvm/config.c

256

(kvm_has_feat(kvm, ID_AA64PFR1_EL1, CSV2_frac, CSV2_1p2) &&

arch/arm64/kvm/config.c

272

return (kvm_has_feat(kvm, ID_AA64MMFR3_EL1, ADERR, FEAT_ADERR) &&

arch/arm64/kvm/config.c

273

kvm_has_feat(kvm, ID_AA64MMFR3_EL1, SDERR, FEAT_ADERR));

arch/arm64/kvm/config.c

278

return (kvm_has_feat(kvm, ID_AA64MMFR3_EL1, ANERR, FEAT_ANERR) &&

arch/arm64/kvm/config.c

279

kvm_has_feat(kvm, ID_AA64MMFR3_EL1, SNERR, FEAT_ANERR));

arch/arm64/kvm/config.c

290

return (kvm_has_feat(kvm, FEAT_SME) &&

arch/arm64/kvm/config.c

300

return (kvm_has_feat(kvm, FEAT_SPEv1p4) &&

arch/arm64/kvm/config.c

310

return (kvm_has_feat(kvm, FEAT_SPEv1p2) &&

arch/arm64/kvm/config.c

320

return (kvm_has_feat(kvm, FEAT_TRBE) &&

arch/arm64/kvm/config.c

321

kvm_has_feat(kvm, FEAT_MPAM) &&

arch/arm64/kvm/config.c

327

return kvm_has_feat(kvm, FEAT_EBEP) || kvm_has_feat(kvm, FEAT_PMUv3_SS);

arch/arm64/kvm/config.c

332

return kvm_has_feat(kvm, FEAT_MixedEnd) || kvm_has_feat(kvm, FEAT_MixedEndEL0);

arch/arm64/kvm/config.c

337

return kvm_has_feat(kvm, FEAT_MTE2) && kvm_has_feat_enum(kvm, FEAT_MTE_ASYNC);

arch/arm64/kvm/config.c

342

(kvm_has_feat((k), ID_AA64DFR0_EL1, PMUVer, r) && \

arch/arm64/kvm/config.c

343

!kvm_has_feat((k), ID_AA64DFR0_EL1, PMUVer, IMP_DEF)); \

arch/arm64/kvm/config.c

368

kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN##s, IMP)) || \

arch/arm64/kvm/config.c

369

kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN##s##_2, IMP))

arch/arm64/kvm/config.c

373

return ((kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN4, 52_BIT) ||

arch/arm64/kvm/config.c

374

!kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN4, IMP)) &&

arch/arm64/kvm/config.c

375

(kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN16, 52_BIT) ||

arch/arm64/kvm/config.c

376

!kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN16, IMP)) &&

arch/arm64/kvm/config.c

377

(kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN4_2, 52_BIT) ||

arch/arm64/kvm/config.c

379

(kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN16_2, 52_BIT) ||

arch/arm64/kvm/emulate-nested.c

2672

if (kvm_has_feat(vcpu->kvm, ID_AA64MMFR2_EL1, IDS, IMP))

arch/arm64/kvm/emulate-nested.c

2761

if (kvm_has_feat(vcpu->kvm, ID_AA64MMFR1_EL1, PAN, IMP))

arch/arm64/kvm/emulate-nested.c

2763

if (kvm_has_feat(vcpu->kvm, ID_AA64PFR1_EL1, NMI, IMP))

arch/arm64/kvm/emulate-nested.c

2766

if (kvm_has_feat(vcpu->kvm, ID_AA64DFR1_EL1, EBEP, IMP))

arch/arm64/kvm/emulate-nested.c

2772

if (kvm_has_feat(vcpu->kvm, ID_AA64PFR1_EL1, GCS, IMP))

arch/arm64/kvm/handle_exit.c

310

if (kvm_has_feat(vcpu->kvm, ID_AA64PFR1_EL1, GCS, IMP))

arch/arm64/kvm/handle_exit.c

341

allowed = kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_V);

arch/arm64/kvm/handle_exit.c

345

allowed = kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA);

arch/arm64/kvm/handle_exit.c

349

allowed = kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64);

arch/arm64/kvm/handle_exit.c

353

allowed = kvm_has_feat(kvm, ID_AA64DFR0_EL1, TraceBuffer, TRBE_V1P1);

arch/arm64/kvm/handle_exit.c

357

allowed = kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMSVer, V1P5);

arch/arm64/kvm/hyp/include/hyp/switch.h

144

if (kvm_has_feat(vcpu->kvm, ID_AA64MMFR3_EL1, S1POE, IMP))

arch/arm64/kvm/hyp/nvhe/pkvm.c

103

if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMUVer, IMP)) {

arch/arm64/kvm/hyp/nvhe/pkvm.c

108

if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, DebugVer, IMP))

arch/arm64/kvm/hyp/nvhe/pkvm.c

111

if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, DoubleLock, IMP))

arch/arm64/kvm/hyp/nvhe/pkvm.c

114

if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMSVer, IMP)) {

arch/arm64/kvm/hyp/nvhe/pkvm.c

119

if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, TraceFilt, IMP))

arch/arm64/kvm/hyp/nvhe/pkvm.c

122

if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, TraceBuffer, IMP))

arch/arm64/kvm/hyp/nvhe/pkvm.c

126

if (!kvm_has_feat(kvm, ID_AA64MMFR0_EL1, FGT, IMP))

arch/arm64/kvm/hyp/nvhe/pkvm.c

141

if (kvm_has_feat(kvm, ID_AA64PFR0_EL1, EL0, AARCH32) ||

arch/arm64/kvm/hyp/nvhe/pkvm.c

142

kvm_has_feat(kvm, ID_AA64PFR0_EL1, EL1, AARCH32))

arch/arm64/kvm/hyp/nvhe/pkvm.c

149

if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, FP, IMP) ||

arch/arm64/kvm/hyp/nvhe/pkvm.c

150

!kvm_has_feat(kvm, ID_AA64PFR0_EL1, AdvSIMD, IMP))

arch/arm64/kvm/hyp/nvhe/pkvm.c

154

if (kvm_has_feat(kvm, ID_AA64PFR1_EL1, SME, IMP))

arch/arm64/kvm/hyp/nvhe/pkvm.c

79

if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, IMP)) {

arch/arm64/kvm/hyp/nvhe/pkvm.c

84

if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, AMU, IMP))

arch/arm64/kvm/hyp/nvhe/pkvm.c

92

if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, LO, IMP))

arch/arm64/kvm/hyp/nvhe/sys_regs.c

363

if (kvm_has_feat(vcpu->kvm, ID_AA64MMFR2_EL1, IDS, IMP))

arch/arm64/kvm/hypercalls.c

323

if (kvm_has_feat(vcpu->kvm, ID_AA64PFR1_EL1, SSBS, IMP))

arch/arm64/kvm/hypercalls.c

459

if (kvm_has_feat(vcpu->kvm, ID_AA64PFR1_EL1, SSBS, IMP))

arch/arm64/kvm/nested.c

1007

if (!kvm_has_feat(kvm, ID_AA64MMFR4_EL1, NV_frac, NV2_ONLY))

arch/arm64/kvm/nested.c

1330

if (!kvm_has_feat(vcpu->kvm, ID_AA64MMFR4_EL1, NV_frac, NV2_ONLY))

arch/arm64/kvm/nested.c

1812

if (!kvm_has_feat(kvm, ID_AA64MMFR2_EL1, CnP, IMP))

arch/arm64/kvm/nested.c

1894

if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, RME, IMP))

arch/arm64/kvm/nested.c

1896

if (!kvm_has_feat(kvm, ID_AA64MMFR0_EL1, ECV, CNTPOFF)) {

arch/arm64/kvm/nested.c

1898

if (!kvm_has_feat(kvm, ID_AA64MMFR0_EL1, ECV, IMP))

arch/arm64/kvm/nested.c

1902

if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, VH, IMP))

arch/arm64/kvm/nested.c

673

if (!ttl || !kvm_has_feat(kvm, ID_AA64MMFR2_EL1, TTL, IMP)) {

arch/arm64/kvm/pmu-emul.c

584

if (!kvm_has_feat(vcpu->kvm, ID_AA64DFR0_EL1, PMUVer, V3P5))

arch/arm64/kvm/pmu-emul.c

72

if (kvm_has_feat(kvm, ID_AA64PFR0_EL1, EL2, IMP))

arch/arm64/kvm/pmu-emul.c

75

if (kvm_has_feat(kvm, ID_AA64PFR0_EL1, EL3, IMP))

arch/arm64/kvm/pmu-emul.c

92

kvm_has_feat(vcpu->kvm, ID_AA64DFR0_EL1, PMUVer, V3P5));

arch/arm64/kvm/sys_regs.c

2031

if (kvm_has_feat(vcpu->kvm, ID_AA64PFR1_EL1, SME, IMP))

arch/arm64/kvm/sys_regs.c

2837

kvm_has_feat(vcpu->kvm, ID_AA64MMFR4_EL1, NV_frac, NV2_ONLY))

arch/arm64/kvm/sys_regs.c

2957

kvm_has_feat(vcpu->kvm, ID_AA64MMFR0_EL1, FGT, FGT2))

arch/arm64/kvm/sys_regs.c

2967

kvm_has_feat(vcpu->kvm, ID_AA64MMFR0_EL1, FGT, IMP))

arch/arm64/kvm/sys_regs.c

3046

if (!(kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, V1P1) ||

arch/arm64/kvm/sys_regs.c

3048

kvm_has_feat(kvm, ID_AA64PFR1_EL1, RAS_frac, RASv1p1)))) {

arch/arm64/kvm/sys_regs.c

3054

if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, IMP)) {

arch/arm64/kvm/sys_regs.c

3900

!kvm_has_feat(vcpu->kvm, ID_AA64ISAR2_EL1, ATS1A, IMP)) {

arch/arm64/kvm/sys_regs.c

3928

!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, XS, IMP))

arch/arm64/kvm/sys_regs.c

3932

!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, OS))

arch/arm64/kvm/sys_regs.c

3966

!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, XS, IMP))

arch/arm64/kvm/sys_regs.c

3970

!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, RANGE))

arch/arm64/kvm/sys_regs.c

3974

!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, OS))

arch/arm64/kvm/sys_regs.c

3978

!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, RANGE))

arch/arm64/kvm/sys_regs.c

4389

u32 el3 = kvm_has_feat(vcpu->kvm, ID_AA64PFR0_EL1, EL3, IMP);

arch/arm64/kvm/sys_regs.c

5726

if (!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, OS))

arch/arm64/kvm/sys_regs.c

788

if (!kvm_has_feat(vcpu->kvm, ID_AA64MMFR1_EL1, LO, IMP))

arch/arm64/kvm/vgic/vgic.h

455

return kvm_has_feat(kvm, ID_AA64PFR0_EL1, GIC, IMP);

arch/arm64/kvm/vgic/vgic.h

460

return kvm_has_feat(kvm, ID_AA64PFR2_EL1, GCIE, IMP);