ksz_write8
ksz_write8(dev, REG_POWER_MANAGEMENT_1,
ksz_write8(dev, REG_POWER_MANAGEMENT_1, 0);
ret = ksz_write8(dev, regs[REG_IND_BYTE], data);
ksz_write8(dev, REG_SW_VLAN_CTRL, VLAN_START | VLAN_WRITE);
ksz_write8(dev, REG_SW_VLAN_CTRL, 0);
ret = ksz_write8(dev, REG_SW_LUE_CTRL_0, value);
return ksz_write8(dev, REG_SW_LUE_CTRL_3, value);
ret = ksz_write8(dev, regs[REG_SW_PME_CTRL], 0);
ksz_write8(dev, REG_HSR_ALU_CTRL_0__1, data);
ret = ksz_write8(dev, REG_SW_GLOBAL_SERIAL_CTRL_0, data8);
.pme_write8 = ksz_write8,
ksz_write8(dev, REG_SW_LUE_CTRL_1,
ksz_write8(dev, REG_SW_GLOBAL_OUTPUT_CTRL__1, data8);
ksz_write8(dev, REG_SW_MAC_CTRL_6, SW_MIB_COUNTER_FLUSH);
ksz_write8(dev, REG_SW_VLAN_CTRL, VLAN_READ | VLAN_START);
ksz_write8(dev, REG_SW_VLAN_CTRL, 0);
ret = ksz_write8(dev, kirq->reg_mask, kirq->masked);
ksz_write8(dev, KSZ87XX_REG_INT_EN, KSZ87XX_INT_PME_MASK);
ret = ksz_write8(dev, regs[REG_SW_MAC_ADDR] + i,
ksz_write8(dev, regs[REG_SW_MAC_ADDR] + i, 0);
return ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data);
ret = ksz_write8(dev, REG_SW_LUE_CTRL_0, value8);
ret = ksz_write8(dev, REG_SW_AGE_PERIOD__1, value);