drivers/gpu/drm/i915/gvt/cmd_parser.c

2111

F_LEN_VAR | F_LEN_VAR_FIXED, R_ALL, D_BDW_PLUS, ADDR_FIX_1(2),

drivers/gpu/drm/i915/gvt/cmd_parser.c

2115

ADDR_FIX_1(1), 10, cmd_handler_mi_store_data_imm},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2127

F_LEN_VAR | F_LEN_VAR_FIXED, R_ALL, D_ALL, ADDR_FIX_1(2), 8,

drivers/gpu/drm/i915/gvt/cmd_parser.c

2133

{"MI_CLFLUSH", OP_MI_CLFLUSH, F_LEN_VAR, R_ALL, D_ALL, ADDR_FIX_1(1),

drivers/gpu/drm/i915/gvt/cmd_parser.c

2137

F_LEN_VAR | F_LEN_VAR_FIXED, R_ALL, D_ALL, ADDR_FIX_1(1), 6,

drivers/gpu/drm/i915/gvt/cmd_parser.c

2141

F_LEN_VAR | F_LEN_VAR_FIXED, R_ALL, D_ALL, ADDR_FIX_1(2), 8,

drivers/gpu/drm/i915/gvt/cmd_parser.c

2153

R_RCS, D_ALL, ADDR_FIX_1(2), 8, NULL, CMD_LEN(2)},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2156

ADDR_FIX_1(2), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2161

{"MI_OP_2F", OP_MI_2F, F_LEN_VAR, R_ALL, D_BDW_PLUS, ADDR_FIX_1(1),

drivers/gpu/drm/i915/gvt/cmd_parser.c

2169

F_LEN_VAR | F_LEN_VAR_FIXED, R_ALL, D_ALL, ADDR_FIX_1(2), 8,

drivers/gpu/drm/i915/gvt/cmd_parser.c

2182

F_LEN_VAR, R_BCS, D_ALL, ADDR_FIX_1(4), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2190

ADDR_FIX_1(3), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2196

ADDR_FIX_1(4), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2202

ADDR_FIX_1(4), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2223

D_ALL, ADDR_FIX_1(4), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2226

F_LEN_VAR, R_BCS, D_ALL, ADDR_FIX_1(4), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2229

D_ALL, ADDR_FIX_1(4), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2245

F_LEN_VAR, R_BCS, D_ALL, ADDR_FIX_1(4), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2412

D_BDW_PLUS, ADDR_FIX_1(2), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2469

D_ALL, ADDR_FIX_1(2), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2493

D_ALL, ADDR_FIX_1(2), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2496

R_RCS, D_ALL, ADDR_FIX_1(2), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2527

F_LEN_VAR, R_RCS, D_BDW_PLUS, ADDR_FIX_1(1), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2530

F_LEN_VAR, R_RCS, D_BDW_PLUS, ADDR_FIX_1(1), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2534

F_LEN_VAR, R_RCS, D_BDW_PLUS, ADDR_FIX_1(1), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2540

ADDR_FIX_1(2), 8, cmd_handler_pipe_control},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2548

ADDR_FIX_1(1), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2556

ADDR_FIX_1(1), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2668

R_VCS, D_ALL, ADDR_FIX_1(2), 12, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

395

#define ADDR_FIX_2(x1, x2) (ADDR_FIX_1(x1) | ADDR_FIX_1(x2))

drivers/gpu/drm/i915/gvt/cmd_parser.c

396

#define ADDR_FIX_3(x1, x2, x3) (ADDR_FIX_1(x1) | ADDR_FIX_2(x2, x3))

drivers/gpu/drm/i915/gvt/cmd_parser.c

397

#define ADDR_FIX_4(x1, x2, x3, x4) (ADDR_FIX_1(x1) | ADDR_FIX_3(x2, x3, x4))

drivers/gpu/drm/i915/gvt/cmd_parser.c

398

#define ADDR_FIX_5(x1, x2, x3, x4, x5) (ADDR_FIX_1(x1) | ADDR_FIX_4(x2, x3, x4, x5))