arch/loongarch/include/asm/inst.h

647

DEF_EMIT_REG2I12_FORMAT(ldb, ldb_op)

arch/loongarch/net/bpf_jit.c

1085

emit_insn(ctx, ldb, dst, src, off);

block/partitions/ldm.c

1154

static bool ldm_ldmdb_add (u8 *data, int len, struct ldmdb *ldb)

block/partitions/ldm.c

1159

BUG_ON (!data || !ldb);

block/partitions/ldm.c

1176

list_add (&vb->list, &ldb->v_dgrp);

block/partitions/ldm.c

1180

list_add (&vb->list, &ldb->v_disk);

block/partitions/ldm.c

1183

list_add (&vb->list, &ldb->v_volu);

block/partitions/ldm.c

1186

list_add (&vb->list, &ldb->v_comp);

block/partitions/ldm.c

1190

list_for_each (item, &ldb->v_part) {

block/partitions/ldm.c

1198

list_add_tail (&vb->list, &ldb->v_part);

block/partitions/ldm.c

1307

static bool ldm_frag_commit (struct list_head *frags, struct ldmdb *ldb)

block/partitions/ldm.c

1312

BUG_ON (!frags || !ldb);

block/partitions/ldm.c

1323

if (!ldm_ldmdb_add (f->data, f->num*ldb->vm.vblk_size, ldb))

block/partitions/ldm.c

1342

struct ldmdb *ldb)

block/partitions/ldm.c

1350

BUG_ON(!state || !ldb);

block/partitions/ldm.c

1352

size = ldb->vm.vblk_size;

block/partitions/ldm.c

1354

skip = ldb->vm.vblk_offset >> 9; /* Bytes to sectors */

block/partitions/ldm.c

1355

finish = (size * ldb->vm.last_vblk_seq) >> 9;

block/partitions/ldm.c

1372

if (!ldm_ldmdb_add (data, size, ldb))

block/partitions/ldm.c

1384

result = ldm_frag_commit (&frags, ldb); /* Failures, already logged */

block/partitions/ldm.c

1431

struct ldmdb *ldb;

block/partitions/ldm.c

1441

ldb = kmalloc_obj(*ldb);

block/partitions/ldm.c

1442

if (!ldb) {

block/partitions/ldm.c

1448

if (!ldm_validate_privheads(state, &ldb->ph))

block/partitions/ldm.c

1452

base = ldb->ph.config_start;

block/partitions/ldm.c

1455

if (!ldm_validate_tocblocks(state, base, ldb) ||

block/partitions/ldm.c

1456

!ldm_validate_vmdb(state, base, ldb))

block/partitions/ldm.c

1460

INIT_LIST_HEAD (&ldb->v_dgrp);

block/partitions/ldm.c

1461

INIT_LIST_HEAD (&ldb->v_disk);

block/partitions/ldm.c

1462

INIT_LIST_HEAD (&ldb->v_volu);

block/partitions/ldm.c

1463

INIT_LIST_HEAD (&ldb->v_comp);

block/partitions/ldm.c

1464

INIT_LIST_HEAD (&ldb->v_part);

block/partitions/ldm.c

1466

if (!ldm_get_vblks(state, base, ldb)) {

block/partitions/ldm.c

1472

if (ldm_create_data_partitions(state, ldb)) {

block/partitions/ldm.c

1479

ldm_free_vblks (&ldb->v_dgrp);

block/partitions/ldm.c

1480

ldm_free_vblks (&ldb->v_disk);

block/partitions/ldm.c

1481

ldm_free_vblks (&ldb->v_volu);

block/partitions/ldm.c

1482

ldm_free_vblks (&ldb->v_comp);

block/partitions/ldm.c

1483

ldm_free_vblks (&ldb->v_part);

block/partitions/ldm.c

1485

kfree (ldb);

block/partitions/ldm.c

352

unsigned long base, struct ldmdb *ldb)

block/partitions/ldm.c

362

BUG_ON(!state || !ldb);

block/partitions/ldm.c

363

ph = &ldb->ph;

block/partitions/ldm.c

364

tb[0] = &ldb->toc;

block/partitions/ldm.c

426

unsigned long base, struct ldmdb *ldb)

block/partitions/ldm.c

434

BUG_ON (!state || !ldb);

block/partitions/ldm.c

436

vm = &ldb->vm;

block/partitions/ldm.c

437

toc = &ldb->toc;

block/partitions/ldm.c

536

static struct vblk * ldm_get_disk_objid (const struct ldmdb *ldb)

block/partitions/ldm.c

540

BUG_ON (!ldb);

block/partitions/ldm.c

542

list_for_each (item, &ldb->v_disk) {

block/partitions/ldm.c

544

if (uuid_equal(&v->vblk.disk.disk_id, &ldb->ph.disk_id))

block/partitions/ldm.c

569

const struct ldmdb *ldb)

block/partitions/ldm.c

577

BUG_ON (!pp || !ldb);

block/partitions/ldm.c

579

disk = ldm_get_disk_objid (ldb);

block/partitions/ldm.c

588

list_for_each (item, &ldb->v_part) {

block/partitions/ldm.c

595

put_partition (pp, part_num, ldb->ph.logical_disk_start +

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

101

ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

103

regmap_write(ldb->regmap, ldb->ctrl_reg, ldb->ldb_ctrl);

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

111

struct ldb *ldb = ldb_ch->ldb;

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

114

DRM_DEV_ERROR(ldb->dev,

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

124

int ldb_init_helper(struct ldb *ldb)

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

126

struct device *dev = ldb->dev;

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

132

ldb->regmap = syscon_node_to_regmap(np->parent);

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

133

if (IS_ERR(ldb->regmap)) {

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

134

ret = PTR_ERR(ldb->regmap);

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

152

ldb_ch = ldb->channel[i];

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

153

ldb_ch->ldb = ldb;

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

158

ldb->available_ch_cnt++;

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

165

int ldb_find_next_bridge_helper(struct ldb *ldb)

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

167

struct device *dev = ldb->dev;

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

172

ldb_ch = ldb->channel[i];

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

193

void ldb_add_bridge_helper(struct ldb *ldb)

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

199

ldb_ch = ldb->channel[i];

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

212

void ldb_remove_bridge_helper(struct ldb *ldb)

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

218

ldb_ch = ldb->channel[i];

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

52

struct ldb *ldb = ldb_ch->ldb;

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

56

ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

63

ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

65

ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

69

ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

72

ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

82

struct ldb *ldb = ldb_ch->ldb;

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

88

regmap_write(ldb->regmap, ldb->ctrl_reg, ldb->ldb_ctrl);

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

95

struct ldb *ldb = ldb_ch->ldb;

drivers/gpu/drm/bridge/imx/imx-ldb-helper.c

99

ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;

drivers/gpu/drm/bridge/imx/imx-ldb-helper.h

43

struct ldb;

drivers/gpu/drm/bridge/imx/imx-ldb-helper.h

46

struct ldb *ldb;

drivers/gpu/drm/bridge/imx/imx-ldb-helper.h

87

int ldb_init_helper(struct ldb *ldb);

drivers/gpu/drm/bridge/imx/imx-ldb-helper.h

89

int ldb_find_next_bridge_helper(struct ldb *ldb);

drivers/gpu/drm/bridge/imx/imx-ldb-helper.h

91

void ldb_add_bridge_helper(struct ldb *ldb);

drivers/gpu/drm/bridge/imx/imx-ldb-helper.h

93

void ldb_remove_bridge_helper(struct ldb *ldb);

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

131

struct ldb *ldb = ldb_ch->ldb;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

134

struct imx8qm_ldb *imx8qm_ldb = base_to_imx8qm_ldb(ldb);

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

172

ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

174

ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

182

ldb->ldb_ctrl |= LDB_CH0_DATA_WIDTH_24BIT;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

184

ldb->ldb_ctrl |= LDB_CH1_DATA_WIDTH_24BIT;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

191

regmap_update_bits(ldb->regmap, SS_CTRL, CH_VSYNC_M(chno), 0);

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

193

regmap_update_bits(ldb->regmap, SS_CTRL,

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

197

regmap_update_bits(ldb->regmap, SS_CTRL, CH_HSYNC_M(chno), 0);

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

199

regmap_update_bits(ldb->regmap, SS_CTRL,

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

207

struct ldb *ldb = ldb_ch->ldb;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

210

struct imx8qm_ldb *imx8qm_ldb = base_to_imx8qm_ldb(ldb);

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

220

ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

221

ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

224

ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

225

ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

253

struct ldb *ldb = ldb_ch->ldb;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

256

struct imx8qm_ldb *imx8qm_ldb = base_to_imx8qm_ldb(ldb);

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

439

struct ldb *ldb;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

477

ldb = &imx8qm_ldb->base;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

478

ldb->dev = dev;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

479

ldb->ctrl_reg = 0xe0;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

48

struct ldb base;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

482

ldb->channel[i] = &imx8qm_ldb->channel[i]->base;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

484

ret = ldb_init_helper(ldb);

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

488

if (ldb->available_ch_cnt == 0) {

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

493

if (ldb->available_ch_cnt == 2) {

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

494

port1 = of_graph_get_port_by_id(ldb->channel[0]->np, 1);

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

495

port2 = of_graph_get_port_by_id(ldb->channel[1]->np, 1);

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

527

ret = ldb_find_next_bridge_helper(ldb);

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

534

ldb_add_bridge_helper(ldb);

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

542

struct ldb *ldb = &imx8qm_ldb->base;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

544

ldb_remove_bridge_helper(ldb);

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

557

struct ldb *ldb = &imx8qm_ldb->base;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

560

regmap_write(ldb->regmap, ldb->ctrl_reg, 0);

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

62

static inline struct imx8qm_ldb *base_to_imx8qm_ldb(struct ldb *base)

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

84

struct ldb *ldb = ldb_ch->ldb;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

87

struct imx8qm_ldb *imx8qm_ldb = base_to_imx8qm_ldb(ldb);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

100

struct ldb *ldb = ldb_ch->ldb;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

103

struct imx8qxp_ldb *imx8qxp_ldb = base_to_imx8qxp_ldb(ldb);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

142

struct ldb *ldb = ldb_ch->ldb;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

145

struct imx8qxp_ldb *imx8qxp_ldb = base_to_imx8qxp_ldb(ldb);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

183

ldb->ldb_ctrl &= ~LDB_CH_SEL;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

185

ldb->ldb_ctrl |= LDB_CH_SEL;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

189

ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

191

ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

198

regmap_write(ldb->regmap, ldb->ctrl_reg, ldb->ldb_ctrl);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

203

regmap_update_bits(ldb->regmap, SS_CTRL, CH_VSYNC_M(chno), 0);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

205

regmap_update_bits(ldb->regmap, SS_CTRL,

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

209

regmap_update_bits(ldb->regmap, SS_CTRL, CH_HSYNC_M(chno), 0);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

211

regmap_update_bits(ldb->regmap, SS_CTRL,

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

222

struct ldb *ldb = ldb_ch->ldb;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

223

struct imx8qxp_ldb *imx8qxp_ldb = base_to_imx8qxp_ldb(ldb);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

238

struct ldb *ldb = ldb_ch->ldb;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

241

struct imx8qxp_ldb *imx8qxp_ldb = base_to_imx8qxp_ldb(ldb);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

248

ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

249

ldb->ldb_ctrl |= imx8qxp_ldb_ch->di_id == 0 ?

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

253

ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

254

ldb->ldb_ctrl |= imx8qxp_ldb_ch->di_id == 0 ?

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

272

struct ldb *ldb = ldb_ch->ldb;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

275

struct imx8qxp_ldb *imx8qxp_ldb = base_to_imx8qxp_ldb(ldb);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

45

struct ldb base;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

592

struct ldb *ldb;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

60

static inline struct imx8qxp_ldb *base_to_imx8qxp_ldb(struct ldb *base)

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

628

ldb = &imx8qxp_ldb->base;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

629

ldb->dev = dev;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

630

ldb->ctrl_reg = 0xe0;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

633

ldb->channel[i] = &imx8qxp_ldb->channel[i]->base;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

635

ret = ldb_init_helper(ldb);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

639

if (ldb->available_ch_cnt == 0) {

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

642

} else if (ldb->available_ch_cnt > 1) {

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

644

ldb->available_ch_cnt);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

667

ret = ldb_find_next_bridge_helper(ldb);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

682

ldb_add_bridge_helper(ldb);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

690

struct ldb *ldb = &imx8qxp_ldb->base;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

692

ldb_remove_bridge_helper(ldb);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

700

struct ldb *ldb = &imx8qxp_ldb->base;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

703

regmap_write(ldb->regmap, ldb->ctrl_reg, 0);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

73

imx8qxp_ldb = base_to_imx8qxp_ldb(ldb_ch->ldb);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

105

ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

107

ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

111

ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

114

ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

120

static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

125

dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

126

clk_get_rate(ldb->clk_pll[chno]), serial_clk);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

127

clk_set_rate(ldb->clk_pll[chno], serial_clk);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

129

dev_dbg(ldb->dev, "%s after: %ld\n", __func__,

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

130

clk_get_rate(ldb->clk_pll[chno]));

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

132

dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

133

clk_get_rate(ldb->clk[chno]),

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

135

clk_set_rate(ldb->clk[chno], di_clk);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

137

dev_dbg(ldb->dev, "%s after: %ld\n", __func__,

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

138

clk_get_rate(ldb->clk[chno]));

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

141

ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

143

dev_err(ldb->dev,

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

151

struct imx_ldb *ldb = imx_ldb_ch->ldb;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

152

int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

155

if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) {

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

156

dev_warn(ldb->dev, "%s: invalid mux %d\n", __func__, mux);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

161

clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

162

clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

164

clk_prepare_enable(ldb->clk[0]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

165

clk_prepare_enable(ldb->clk[1]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

167

clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

170

if (imx_ldb_ch == &ldb->channel[0] || dual) {

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

171

ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

172

if (mux == 0 || ldb->lvds_mux)

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

173

ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

175

ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

177

if (imx_ldb_ch == &ldb->channel[1] || dual) {

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

178

ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

179

if (mux == 1 || ldb->lvds_mux)

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

180

ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

182

ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

185

if (ldb->lvds_mux) {

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

188

if (imx_ldb_ch == &ldb->channel[0])

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

189

lvds_mux = &ldb->lvds_mux[0];

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

190

else if (imx_ldb_ch == &ldb->channel[1])

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

191

lvds_mux = &ldb->lvds_mux[1];

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

193

regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

197

regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

207

struct imx_ldb *ldb = imx_ldb_ch->ldb;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

208

int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

214

if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) {

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

215

dev_warn(ldb->dev, "%s: invalid mux %d\n", __func__, mux);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

220

dev_warn(ldb->dev,

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

224

dev_warn(ldb->dev,

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

229

dev_warn(ldb->dev,

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

235

imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

236

imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

239

imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

244

if (imx_ldb_ch == &ldb->channel[0] || dual) {

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

246

ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

248

ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

250

if (imx_ldb_ch == &ldb->channel[1] || dual) {

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

252

ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

254

ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

270

struct imx_ldb *ldb = imx_ldb_ch->ldb;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

271

int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

274

if (imx_ldb_ch == &ldb->channel[0] || dual)

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

275

ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

276

if (imx_ldb_ch == &ldb->channel[1] || dual)

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

277

ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

279

regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

282

clk_disable_unprepare(ldb->clk[0]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

283

clk_disable_unprepare(ldb->clk[1]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

286

if (ldb->lvds_mux) {

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

289

if (imx_ldb_ch == &ldb->channel[0])

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

290

lvds_mux = &ldb->lvds_mux[0];

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

291

else if (imx_ldb_ch == &ldb->channel[1])

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

292

lvds_mux = &ldb->lvds_mux[1];

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

294

regmap_read(ldb->regmap, lvds_mux->reg, &mux);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

298

mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

302

ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

304

dev_err(ldb->dev,

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

353

static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

358

ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

359

if (IS_ERR(ldb->clk[chno]))

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

360

return PTR_ERR(ldb->clk[chno]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

363

ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

365

return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

371

struct imx_ldb *ldb = imx_ldb_ch->ldb;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

389

ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

393

if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

394

ret = imx_ldb_get_clk(ldb, 1);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

485

if (!channel->ldb)

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

572

channel->ldb = imx_ldb;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

62

struct imx_ldb *ldb;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

97

struct imx_ldb *ldb = imx_ldb_ch->ldb;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

98

int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;

drivers/mtd/nand/raw/marvell_nand.c

271

#define MARVELL_LAYOUT(ws, dc, ds, nc, fcc, db, sb, eb, ldb, lsb, leb) \

drivers/mtd/nand/raw/marvell_nand.c

281

.last_data_bytes = ldb, \

fs/xfs/libxfs/xfs_dir2_leaf.c

446

xfs_dir2_db_t ldb; /* leaf block's bno */

fs/xfs/libxfs/xfs_dir2_leaf.c

467

ldb = xfs_dir2_da_to_db(args->geo, blkno);

fs/xfs/libxfs/xfs_dir2_leaf.c

468

ASSERT(ldb == xfs_dir2_byte_to_db(args->geo, XFS_DIR2_LEAF_OFFSET));

fs/xfs/libxfs/xfs_dir2_leaf.c

472

error = xfs_dir3_leaf_get_buf(args, ldb, &lbp, XFS_DIR2_LEAF1_MAGIC);

tools/bpf/bpf_exp.y

122

ldb

tools/bpf/bpf_exp.y

86

: ldb