lan_rmw
lan_rmw(QSYS_SE_CFG_SE_AVB_ENA_SET(1) |
lan_rmw(QSYS_SE_CFG_SE_AVB_ENA_SET(1) |
lan_rmw(QSYS_SE_CFG_SE_DWRR_CNT_SET(count) |
lan_rmw(QSYS_SE_CFG_SE_DWRR_CNT_SET(0) |
lan_rmw(FDMA_PORT_CTRL_XTR_STOP_SET(0),
lan_rmw(FDMA_INTR_DB_ENA_INTR_DB_ENA_SET(mask),
lan_rmw(FDMA_CH_ACTIVATE_CH_ACTIVATE_SET(BIT(fdma->channel_id)),
lan_rmw(FDMA_CH_DISABLE_CH_DISABLE_SET(BIT(fdma->channel_id)),
lan_rmw(FDMA_CH_DB_DISCARD_DB_DISCARD_SET(BIT(fdma->channel_id)),
lan_rmw(FDMA_CH_RELOAD_CH_RELOAD_SET(BIT(rx->fdma.channel_id)),
lan_rmw(FDMA_PORT_CTRL_INJ_STOP_SET(0),
lan_rmw(FDMA_INTR_DB_ENA_INTR_DB_ENA_SET(mask),
lan_rmw(FDMA_CH_ACTIVATE_CH_ACTIVATE_SET(BIT(fdma->channel_id)),
lan_rmw(FDMA_CH_DISABLE_CH_DISABLE_SET(BIT(fdma->channel_id)),
lan_rmw(FDMA_CH_DB_DISCARD_DB_DISCARD_SET(BIT(fdma->channel_id)),
lan_rmw(FDMA_CH_RELOAD_CH_RELOAD_SET(BIT(tx->fdma.channel_id)),
lan_rmw(QSYS_SW_PORT_MODE_PORT_ENA_SET(0),
lan_rmw(QSYS_SW_PORT_MODE_PORT_ENA_SET(1),
lan_rmw(ANA_PORT_CFG_PORTID_VAL_SET(lag_id),
lan_rmw(ANA_AUTOAGE_AGE_PERIOD_SET(ageing / 2),
lan_rmw(ANA_MACACCESS_MAC_TABLE_CMD_SET(MACACCESS_CMD_SYNC_GET_NEXT),
lan_rmw(ANA_ANAINTR_INTR_SET(0),
lan_rmw(ANA_PGID_PGID_SET(BIT(CPU_PORT)),
lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0),
lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0),
lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0),
lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0),
lan_rmw(ANA_PGID_PGID_SET(BIT(CPU_PORT) | GENMASK(lan966x->num_phys_ports - 1, 0)),
lan_rmw(ANA_ANAINTR_INTR_ENA_SET(1),
lan_rmw(ANA_PORT_CFG_LEARNAUTO_SET(1) |
lan_rmw(ANA_ADVLEARN_VLAN_CHK_SET(1),
lan_rmw(QS_INJ_CTRL_GAP_SIZE_SET(0),
lan_rmw(ANA_FLOODING_FLD_MULTICAST_SET(PGID_MC) |
lan_rmw(ANA_PGID_CFG_OBEY_VLAN_SET(1),
lan_rmw(ANA_PGID_PGID_SET(0x0),
lan_rmw(ANA_PGID_PGID_SET(0),
lan_rmw(ANA_PGID_PGID_SET(mdb_entry->ports),
lan_rmw(ANA_PGID_PGID_SET(mdb_entry->ports),
lan_rmw(ANA_PGID_PGID_SET(mdb_entry->ports),
lan_rmw(ANA_PGID_PGID_SET(mdb_entry->ports),
lan_rmw(ANA_PORT_CFG_SRC_MIRROR_ENA_SET(1),
lan_rmw(ANA_PORT_CFG_SRC_MIRROR_ENA_SET(0),
lan_rmw(DEV_CLOCK_CFG_PCS_RX_RST_SET(0) |
lan_rmw(ANA_POL_CFG_PORT_POL_ENA_SET(1) |
lan_rmw(ANA_POL_CFG_PORT_POL_ENA_SET(0) |
lan_rmw(DEV_MAC_ENA_CFG_TX_ENA_SET(0),
lan_rmw(DEV_CLOCK_CFG_PORT_RST_SET(1),
lan_rmw(DEV_CLOCK_CFG_MAC_TX_RST_SET(1) |
lan_rmw(QSYS_SW_PORT_MODE_AGING_MODE_SET(2),
lan_rmw(DEV_MAC_IFG_CFG_TX_IFG_SET(config->duplex ? 6 : 5) |
lan_rmw(DEV_MAC_HDX_CFG_SEED_SET(4) |
lan_rmw(CHIP_TOP_CUPHY_PORT_CFG_GTX_CLK_ENA_SET(1),
lan_rmw(CHIP_TOP_CUPHY_PORT_CFG_GTX_CLK_ENA_SET(0),
lan_rmw(DEV_PCS1G_CFG_PCS_ENA_SET(1),
lan_rmw(DEV_PCS1G_SD_CFG_SD_ENA_SET(0),
lan_rmw(SYS_MAC_FC_CFG_FC_LINK_SPEED_SET(speed) |
lan_rmw(AFI_PORT_CFG_FC_SKIP_TTI_INJ_SET(0) |
lan_rmw(AFI_PORT_CFG_FC_SKIP_TTI_INJ_SET(1) |
lan_rmw(DEV_PCS1G_MODE_CFG_SGMII_MODE_ENA_SET(outband) |
lan_rmw(DEV_CLOCK_CFG_LINK_SPEED_SET(LAN966X_SPEED_1000) |
lan_rmw(ANA_QOS_CFG_QOS_PCP_ENA_SET(qos->enable),
lan_rmw(ANA_PCP_DEI_CFG_QOS_PCP_DEI_VAL_SET(pcp) |
lan_rmw(ANA_QOS_CFG_QOS_DSCP_ENA_SET(qos->enable),
lan_rmw(ANA_DSCP_CFG_DP_DSCP_VAL_SET(0) |
lan_rmw(ANA_DSCP_CFG_DSCP_TRUST_ENA_SET(qos->enable),
lan_rmw(ANA_QOS_CFG_DP_DEFAULT_VAL_SET(0) |
lan_rmw(ANA_VLAN_CFG_VLAN_DEI_SET(0) |
lan_rmw(REW_TAG_CFG_TAG_PCP_CFG_SET(mode) |
lan_rmw(REW_PCP_DEI_CFG_DEI_QOS_VAL_SET(dei) |
lan_rmw(REW_DSCP_CFG_DSCP_REWR_CFG_SET(mode),
lan_rmw(ANA_DSCP_REWR_CFG_DSCP_QOS_REWR_VAL_SET(dscp),
lan_rmw(ANA_QOS_CFG_DSCP_REWR_CFG_SET(mode),
lan_rmw(DEV_CLOCK_CFG_PCS_RX_RST_SET(1),
lan_rmw(ANA_PORT_CFG_LEARN_ENA_SET(0),
lan_rmw(DEV_CLOCK_CFG_PCS_RX_RST_SET(0) |
lan_rmw(DEV_MAC_ENA_CFG_RX_ENA_SET(0),
lan_rmw(QSYS_SW_PORT_MODE_PORT_ENA_SET(0),
lan_rmw(QSYS_PORT_MODE_DEQUEUE_DIS_SET(1),
lan_rmw(SYS_PAUSE_CFG_PAUSE_ENA_SET(0),
lan_rmw(QSYS_SW_PORT_MODE_TX_PFC_ENA_SET(0),
lan_rmw(SYS_FRONT_PORT_MODE_HDX_MODE_SET(0),
lan_rmw(QSYS_SW_PORT_MODE_AGING_MODE_SET(3),
lan_rmw(QSYS_PORT_MODE_DEQUEUE_DIS_SET(0),
lan_rmw(PTP_DOM_CFG_CLKCFG_DIS_SET(0x7),
lan_rmw(PTP_DOM_CFG_CLKCFG_DIS_SET(0),
lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_SAVE) |
lan_rmw(PTP_TWOSTEP_CTRL_NXT_SET(1),
lan_rmw(PTP_TWOSTEP_CTRL_NXT_SET(1),
lan_rmw(PTP_DOM_CFG_CLKCFG_DIS_SET(1 << BIT(phc->index)),
lan_rmw(PTP_DOM_CFG_CLKCFG_DIS_SET(0),
lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_IDLE) |
lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_LOAD) |
lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_SAVE) |
lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_IDLE) |
lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_DELTA) |
lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_IDLE) |
lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_CLOCK) |
lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_CLOCK) |
lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_SAVE) |
lan_rmw(ANA_PORT_CFG_LEARN_ENA_SET(learn_ena),
lan_rmw(ANA_CPU_FWD_CFG_IGMP_REDIR_ENA_SET(mcast_ena) |
lan_rmw(ANA_PGID_PGID_SET(flood_mask_ip),
lan_rmw(ANA_PGID_PGID_SET(val),
lan_rmw(ANA_PGID_PGID_SET(val),
lan_rmw(ANA_PGID_PGID_SET(val),
lan_rmw(ANA_PORT_CFG_LEARN_ENA_SET(enabled),
lan_rmw(QSYS_TAS_CFG_CTRL_GCL_ENTRY_NUM_SET(next),
lan_rmw(QSYS_TAS_CFG_CTRL_LIST_NUM_SET(list),
lan_rmw(QSYS_TAS_LIST_CFG_LIST_BASE_ADDR_SET(base),
lan_rmw(QSYS_TAS_CFG_CTRL_GCL_ENTRY_NUM_SET(next),
lan_rmw(QSYS_TAS_PROFILE_CFG_LINK_SPEED_SET(taprio_speed),
lan_rmw(QSYS_TAS_STARTUP_CFG_OBSOLETE_IDX_SET(obs_list),
lan_rmw(QSYS_TAS_LST_LIST_STATE_SET(LAN966X_TAPRIO_STATE_ADVANCING),
lan_rmw(QSYS_TAS_CFG_CTRL_LIST_NUM_MAX_SET(num_taprio_lists) |
lan_rmw(QSYS_TAS_PROFILE_CFG_PORT_NUM_SET(p),
lan_rmw(QSYS_TAS_CFG_CTRL_LIST_NUM_SET(list),
lan_rmw(QSYS_TAS_LST_LIST_STATE_SET(state),
lan_rmw(QSYS_SE_CFG_SE_AVB_ENA_SET(0) |
lan_rmw(QSYS_SE_CFG_SE_AVB_ENA_SET(0) |
lan_rmw(ANA_VCAP_CFG_S1_ENA_SET(true),
lan_rmw(REW_PORT_CFG_ES0_EN_SET(false),
lan_rmw(ANA_VCAP_S2_CFG_ENA_SET(true),
lan_rmw(ANA_VCAP_CFG_S1_ENA_SET(true),
lan_rmw(REW_PORT_CFG_ES0_EN_SET(true),
lan_rmw(REW_STAT_CFG_STAT_MODE_SET(1),
lan_rmw(val,
lan_rmw(val,
lan_rmw(DEV_MAC_TAGS_CFG_VLAN_AWR_ENA_SET(port->vlan_aware) |
lan_rmw(val,
lan_rmw(REW_PORT_VLAN_CFG_PORT_TPID_SET(ETH_P_8021Q) |
lan_rmw(ANA_VLANACCESS_VLAN_TBL_CMD_SET(VLANACCESS_CMD_INIT),
lan_rmw(ANA_VLANTIDX_VLAN_PGID_CPU_DIS_SET(cpu_dis) |
lan_rmw(ANA_VLAN_PORT_MASK_VLAN_PORT_MASK_SET(mask),
lan_rmw(ANA_VLANACCESS_VLAN_TBL_CMD_SET(VLANACCESS_CMD_WRITE),
lan_rmw(HSIO_SD_CFG_LANE_10BIT_SEL_SET(res_struct->lane_10bit_sel) |
lan_rmw(HSIO_MPLL_CFG_MPLL_MULTIPLIER_SET(res_struct->mpll_multiplier) |
lan_rmw(HSIO_SD_CFG_RX_TERM_EN_SET(res_struct->rx_term_en),
lan_rmw(HSIO_MPLL_CFG_REF_SSP_EN_SET(1),
lan_rmw(HSIO_SD_CFG_PHY_RESET_SET(0),
lan_rmw(HSIO_MPLL_CFG_MPLL_EN_SET(1),
lan_rmw(HSIO_SD_CFG_TX_CM_EN_SET(1),
lan_rmw(HSIO_SD_CFG_RX_PLL_EN_SET(1) |
lan_rmw(HSIO_SD_CFG_TX_DATA_EN_SET(1) |
lan_rmw(HSIO_RGMII_CFG_RGMII_RX_RST_SET(0) |
lan_rmw(HSIO_DLL_CFG_DLL_RST_SET(0) |
lan_rmw(HSIO_DLL_CFG_DELAY_ENA_SET(rx_delay),
lan_rmw(HSIO_DLL_CFG_DLL_RST_SET(0) |
lan_rmw(HSIO_DLL_CFG_DELAY_ENA_SET(tx_delay),
lan_rmw(val, lan966x_serdes_muxes[i].mask,