kw_write_reg
kw_write_reg(reg_control, KW_I2C_CTL_STOP);
kw_write_reg(reg_isr, isr);
kw_write_reg(reg_status, 0);
kw_write_reg(reg_ier, 0x00);
kw_write_reg(reg_control,
kw_write_reg(reg_data, *(host->data++));
kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
kw_write_reg(reg_control, 0);
kw_write_reg(reg_data, *(host->data++));
kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
kw_write_reg(reg_isr, KW_I2C_IRQ_START);
kw_write_reg(reg_isr, kw_read_reg(reg_isr));
kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
kw_write_reg(reg_status, 0);
kw_write_reg(reg_addr, addrdir & 0xff);
kw_write_reg(reg_subaddr, subaddr);
kw_write_reg(reg_isr, kw_read_reg(reg_isr));
kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
kw_write_reg(reg_ier, 0);
kw_write_reg(reg_ier, 0);