CLK_GOUT_PERI_UART2_SCLK_UART
GATE(CLK_GOUT_PERI_UART2_SCLK_UART, "uart2_sclk", "dout_peri_uart2",
GATE(CLK_GOUT_PERI_UART2_SCLK_UART, "clk_uart_baud2", "dout_peri_uart2",
#define CMU_PERI_NR_CLK (CLK_GOUT_PERI_UART2_SCLK_UART + 1)