arch/x86/kvm/lapic.c

1028

logical_id = kvm_lapic_get_reg(apic, APIC_LDR);

arch/x86/kvm/lapic.c

1036

switch (kvm_lapic_get_reg(apic, APIC_DFR)) {

arch/x86/kvm/lapic.c

141

if (!(kvm_lapic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI))

arch/x86/kvm/lapic.c

1660

if (kvm_lapic_get_reg(apic, APIC_TMICT) == 0 ||

arch/x86/kvm/lapic.c

1709

val = kvm_lapic_get_reg(apic, offset);

arch/x86/kvm/lapic.c

1715

val = kvm_lapic_get_reg(apic, offset);

arch/x86/kvm/lapic.c

1839

tdcr = kvm_lapic_get_reg(apic, APIC_TDCR);

arch/x86/kvm/lapic.c

1880

u32 timer_mode = kvm_lapic_get_reg(apic, APIC_LVTT) &

arch/x86/kvm/lapic.c

1914

reg = kvm_lapic_get_reg(apic, APIC_LVTT);

arch/x86/kvm/lapic.c

2106

tmict_to_ns(apic, kvm_lapic_get_reg(apic, APIC_TMICT));

arch/x86/kvm/lapic.c

2132

tmict_to_ns(apic, kvm_lapic_get_reg(apic, APIC_TMICT));

arch/x86/kvm/lapic.c

2145

kvm_lapic_get_reg(apic, count_reg));

arch/x86/kvm/lapic.c

2159

kvm_lapic_get_reg(apic, count_reg),

arch/x86/kvm/lapic.c

2445

if (kvm_lapic_get_reg(apic, APIC_LVR) & APIC_LVR_DIRECTED_EOI)

arch/x86/kvm/lapic.c

2453

kvm_lapic_get_reg(apic, APIC_LVTx(i)) | APIC_LVT_MASKED);

arch/x86/kvm/lapic.c

2466

kvm_apic_send_ipi(apic, val, kvm_lapic_get_reg(apic, APIC_ICR2));

arch/x86/kvm/lapic.c

2649

return (u64)kvm_lapic_get_reg(apic, APIC_ICR) |

arch/x86/kvm/lapic.c

2650

(u64)kvm_lapic_get_reg(apic, APIC_ICR2) << 32;

arch/x86/kvm/lapic.c

2674

kvm_lapic_reg_write(apic, offset, kvm_lapic_get_reg(apic, offset));

arch/x86/kvm/lapic.c

2737

tpr = (u64) kvm_lapic_get_reg(vcpu->arch.apic, APIC_TASKPRI);

arch/x86/kvm/lapic.c

2947

apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0));

arch/x86/kvm/lapic.c

3006

u32 reg = kvm_lapic_get_reg(apic, lvt_type);

arch/x86/kvm/lapic.c

3134

u32 lvt0 = kvm_lapic_get_reg(vcpu->arch.apic, APIC_LVT0);

arch/x86/kvm/lapic.c

3281

apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0));

arch/x86/kvm/lapic.c

3397

tpr = kvm_lapic_get_reg(apic, APIC_TASKPRI) & 0xff;

arch/x86/kvm/lapic.c

342

ldr = kvm_lapic_get_reg(apic, APIC_LDR);

arch/x86/kvm/lapic.c

350

if (kvm_lapic_get_reg(apic, APIC_DFR) == APIC_DFR_FLAT)

arch/x86/kvm/lapic.c

571

return !(kvm_lapic_get_reg(apic, lvt_type) & APIC_LVT_MASKED);

arch/x86/kvm/lapic.c

957

old_ppr = kvm_lapic_get_reg(apic, APIC_PROCPRI);

arch/x86/kvm/lapic.c

958

tpr = kvm_lapic_get_reg(apic, APIC_TASKPRI);

arch/x86/kvm/lapic.h

268

return kvm_lapic_get_reg(apic, APIC_ID) >> 24;

arch/x86/kvm/pmu.c

1352

perf_load_guest_lvtpc(kvm_lapic_get_reg(vcpu->arch.apic, APIC_LVTPC));

arch/x86/kvm/svm/avic.c

552

} else if (kvm_lapic_get_reg(source, APIC_DFR) == APIC_DFR_FLAT) {

arch/x86/kvm/svm/avic.c

699

flat = kvm_lapic_get_reg(vcpu->arch.apic, APIC_DFR) == APIC_DFR_FLAT;

arch/x86/kvm/svm/avic.c

729

u32 ldr = kvm_lapic_get_reg(vcpu->arch.apic, APIC_LDR);

arch/x86/kvm/svm/avic.c

748

u32 dfr = kvm_lapic_get_reg(vcpu->arch.apic, APIC_DFR);

arch/x86/kvm/vmx/tdx.c

1093

if (pi_test_pir(kvm_lapic_get_reg(vcpu->arch.apic, APIC_LVTT) &