arch/arm64/kvm/arch_timer.c

1440

kvm_debug("virtual timer IRQ%d\n", host_vtimer_irq);

arch/arm64/kvm/arch_timer.c

1462

kvm_debug("physical timer IRQ%d\n", host_ptimer_irq);

arch/arm64/kvm/arch_timer.c

1560

kvm_debug("incorrectly configured timer irqs\n");

arch/arm64/kvm/mmu.c

2316

kvm_debug("Using %u-bit virtual addresses at EL2\n", hyp_va_bits);

arch/arm64/kvm/mmu.c

2317

kvm_debug("IDMAP page: %lx\n", hyp_idmap_start);

arch/arm64/kvm/mmu.c

2318

kvm_debug("HYP VA range: %lx:%lx\n",

arch/arm64/kvm/pmu-emul.c

1154

kvm_debug("Set kvm ARM PMU irq: %d\n", irq);

arch/arm64/kvm/pmu-emul.c

337

kvm_debug("fail to enable perf event\n");

arch/arm64/kvm/reset.c

311

kvm_debug("PAGE_SIZE supported at Stage-2 (default)\n");

arch/arm64/kvm/reset.c

314

kvm_debug("PAGE_SIZE supported at Stage-2 (advertised)\n");

arch/arm64/kvm/vgic/vgic-v2.c

428

kvm_debug("Need to set vgic cpu and dist addresses first\n");

arch/arm64/kvm/vgic/vgic-v2.c

433

kvm_debug("VGIC CPU and dist frames overlap\n");

arch/arm64/kvm/vgic/vgic-v2.c

534

kvm_debug("vgic-v2@%llx\n", info->vctrl.start);

arch/arm64/kvm/vgic/vgic-v3.c

756

kvm_debug("vcpu %ld redistributor base not set\n", c);

arch/arm64/kvm/vgic/vgic-v3.c

762

kvm_debug("Need to set vgic distributor addresses first\n");

arch/arm64/kvm/vgic/vgic-v3.c

767

kvm_debug("VGIC redist and dist frames overlap\n");

arch/loongarch/kvm/main.c

325

kvm_debug("GCFG:%lx GSTAT:%lx GINTC:%lx GTLBC:%lx",

arch/loongarch/kvm/vcpu.c

1518

kvm_debug("[%d] %s: irq: %d\n", vcpu->vcpu_id, __func__, irq.irq);

arch/loongarch/kvm/vcpu.c

458

kvm_debug("vCPU Register Dump:\n");

arch/loongarch/kvm/vcpu.c

459

kvm_debug("\tPC = 0x%08lx\n", vcpu->arch.pc);

arch/loongarch/kvm/vcpu.c

460

kvm_debug("\tExceptions: %08lx\n", vcpu->arch.irq_pending);

arch/loongarch/kvm/vcpu.c

463

kvm_debug("\tGPR%02d: %08lx %08lx %08lx %08lx\n", i,

arch/loongarch/kvm/vcpu.c

468

kvm_debug("\tCRMD: 0x%08lx, ESTAT: 0x%08lx\n",

arch/loongarch/kvm/vcpu.c

472

kvm_debug("\tERA: 0x%08lx\n", kvm_read_hw_gcsr(LOONGARCH_CSR_ERA));

arch/mips/kvm/emulate.c

1002

kvm_debug("[%#lx] OP_SD: eaddr: %#lx, gpr: %#lx, data: %#llx\n",

arch/mips/kvm/emulate.c

1012

kvm_debug("[%#lx] OP_SW: eaddr: %#lx, gpr: %#lx, data: %#x\n",

arch/mips/kvm/emulate.c

1021

kvm_debug("[%#lx] OP_SH: eaddr: %#lx, gpr: %#lx, data: %#x\n",

arch/mips/kvm/emulate.c

1030

kvm_debug("[%#lx] OP_SB: eaddr: %#lx, gpr: %#lx, data: %#x\n",

arch/mips/kvm/emulate.c

1060

kvm_debug("[%#lx] OP_SWL: eaddr: %#lx, gpr: %#lx, data: %#x\n",

arch/mips/kvm/emulate.c

1090

kvm_debug("[%#lx] OP_SWR: eaddr: %#lx, gpr: %#lx, data: %#x\n",

arch/mips/kvm/emulate.c

1138

kvm_debug("[%#lx] OP_SDL: eaddr: %#lx, gpr: %#lx, data: %llx\n",

arch/mips/kvm/emulate.c

1185

kvm_debug("[%#lx] OP_SDR: eaddr: %#lx, gpr: %#lx, data: %llx\n",

arch/mips/kvm/emulate.c

1207

kvm_debug("[%#lx] OP_GSSBX: eaddr: %#lx, gpr: %#lx, data: %#x\n",

arch/mips/kvm/emulate.c

1215

kvm_debug("[%#lx] OP_GSSSHX: eaddr: %#lx, gpr: %#lx, data: %#x\n",

arch/mips/kvm/emulate.c

1223

kvm_debug("[%#lx] OP_GSSWX: eaddr: %#lx, gpr: %#lx, data: %#x\n",

arch/mips/kvm/emulate.c

1231

kvm_debug("[%#lx] OP_GSSDX: eaddr: %#lx, gpr: %#lx, data: %#llx\n",

arch/mips/kvm/emulate.c

256

kvm_debug("update_pc(): New PC: %#lx\n", vcpu->arch.pc);

arch/mips/kvm/emulate.c

947

kvm_debug("[%#lx] !!!WAIT!!! (%#lx)\n", vcpu->arch.pc,

arch/mips/kvm/hypcall.c

22

kvm_debug("[%#lx] HYPCALL %#03x\n", vcpu->arch.pc, code);

arch/mips/kvm/mips.c

1090

kvm_debug("VCPU Register Dump:\n");

arch/mips/kvm/mips.c

1091

kvm_debug("\tpc = 0x%08lx\n", vcpu->arch.pc);

arch/mips/kvm/mips.c

1092

kvm_debug("\texceptions: %08lx\n", vcpu->arch.pending_exceptions);

arch/mips/kvm/mips.c

1095

kvm_debug("\tgpr%02d: %08lx %08lx %08lx %08lx\n", i,

arch/mips/kvm/mips.c

1100

kvm_debug("\thi: 0x%08lx\n", vcpu->arch.hi);

arch/mips/kvm/mips.c

1101

kvm_debug("\tlo: 0x%08lx\n", vcpu->arch.lo);

arch/mips/kvm/mips.c

1104

kvm_debug("\tStatus: 0x%08x, Cause: 0x%08x\n",

arch/mips/kvm/mips.c

1108

kvm_debug("\tEPC: 0x%08lx\n", kvm_read_c0_guest_epc(cop0));

arch/mips/kvm/mips.c

1192

kvm_debug("kvm_mips_handle_exit: cause: %#x, PC: %p, kvm_run: %p, kvm_vcpu: %p\n",

arch/mips/kvm/mips.c

1198

kvm_debug("[%d]EXCCODE_INT @ %p\n", vcpu->vcpu_id, opc);

arch/mips/kvm/mips.c

1209

kvm_debug("EXCCODE_CPU: @ PC: %p\n", opc);

arch/mips/kvm/mips.c

1224

kvm_debug("TLB ST fault: cause %#x, status %#x, PC: %p, BadVaddr: %#lx\n",

arch/mips/kvm/mips.c

1233

kvm_debug("TLB LD fault: cause %#x, PC: %p, BadVaddr: %#lx\n",

arch/mips/kvm/mips.c

284

kvm_debug("kvm @ %p: create cpu %d at %p\n",

arch/mips/kvm/mips.c

309

kvm_debug("Allocated %d bytes for KVM Exception Handlers @ %p\n",

arch/mips/kvm/mips.c

341

kvm_debug("L1 Vectored handler @ %p\n",

arch/mips/kvm/mips.c

489

kvm_debug("%s: CPU: %d, INTR: %d\n", __func__, irq->cpu,

arch/mips/kvm/mips.c

909

kvm_debug("[%d] %s: irq: %d\n", vcpu->vcpu_id, __func__,

arch/mips/kvm/mmu.c

679

kvm_debug("%s: vcpu %p, cpu: %d\n", __func__, vcpu, cpu);

arch/mips/kvm/mmu.c

685

kvm_debug("[%d->%d]KVM VCPU[%d] switch\n",

arch/mips/kvm/tlb.c

144

kvm_debug("%s: Invalidated root entryhi %#lx @ idx %d\n",

arch/mips/kvm/vz.c

1104

kvm_debug("CACHE (cache: %#x, op: %#x, base[%d]: %#lx, offset: %#x\n",

include/linux/kvm_host.h

899

kvm_debug("vcpu%i " fmt, (vcpu)->vcpu_id, ## __VA_ARGS__)