ksz_write16
ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
ret = ksz_write16(dev, sw_reg, val);
ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
ksz_write16(dev, REG_SW_VLAN_ENTRY_INDEX__2, vid & VLAN_INDEX_M);
ksz_write16(dev, REG_SW_VLAN_ENTRY_INDEX__2, vid & VLAN_INDEX_M);
ret = ksz_write16(dev, regs[REG_SW_MAC_ADDR] + i,
return ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset),
ret = ksz_write16(dev, ptpirq->reg_status, data);
ret = ksz_write16(dev, kirq->reg_mask, kirq->masked);
ret = ksz_write16(dev, regs[PTP_RTC_SUB_NANOSEC], PTP_RTC_0NS);
ret = ksz_write16(dev, regs[PTP_CLK_CTRL], data16);
return ksz_write16(dev, REG_VPHY_IND_ADDR__2, temp);
ret = ksz_write16(dev, REG_VPHY_IND_DATA__2, val);
ret = ksz_write16(dev, REG_VPHY_IND_CTRL__2,
ret = ksz_write16(dev, REG_VPHY_IND_CTRL__2, VPHY_IND_BUSY);
return ksz_write16(dev, REG_SW_AGE_PERIOD__2, value);