ksz_regmap_32
return regmap_read_poll_timeout(ksz_regmap_32(dev), REG_SW_ALU_CTRL__4,
return regmap_read_poll_timeout(ksz_regmap_32(dev),
regmap_update_bits(ksz_regmap_32(dev), addr, bits, set ? bits : 0);
ret = regmap_read_poll_timeout(ksz_regmap_32(dev),
regmap_update_bits(ksz_regmap_32(dev), PORT_CTRL_ADDR(port, offset),
int ret = regmap_read(ksz_regmap_32(dev), reg, &value);
ret = regmap_bulk_read(ksz_regmap_32(dev), reg, value, 2);
ret = regmap_write(ksz_regmap_32(dev), reg, value);
ret = regmap_update_bits(ksz_regmap_32(dev), reg, mask, value);
return regmap_bulk_write(ksz_regmap_32(dev), reg, val, 2);