kmb_read_mipi
val = kmb_read_mipi(kmb_dsi, DPHY_INIT_CTRL0);
kmb_read_mipi(kmb_dsi, MIPI_DPHY_ERR_STAT6_7));
u32 reg_val = kmb_read_mipi(kmb_dsi, reg);
u32 reg_val = kmb_read_mipi(kmb_dsi, reg);
u32 reg_val = kmb_read_mipi(kmb_dsi, reg);
#define MIPI_GET_IRQ_STAT0(dev) kmb_read_mipi(dev, \
#define MIPI_GET_IRQ_STAT1(dev) kmb_read_mipi(dev, \
#define MIPI_GET_IRQ_ENABLED0(dev) kmb_read_mipi(dev, \
#define MIPI_GET_IRQ_ENABLED1(dev) kmb_read_mipi(dev, \
#define GET_MIPI_TX_HS_IRQ_STATUS(dev, M) kmb_read_mipi(dev, \
#define GET_HS_IRQ_ENABLE(dev, M) kmb_read_mipi(dev, \
(((kmb_read_mipi(dev, MIPI_DPHY_STAT0_3 + \
(kmb_read_mipi(dev, DPHY_TEST_DOUT0_3) \
(kmb_read_mipi(dev, DPHY_TEST_DOUT4_7) \
(kmb_read_mipi(dev, DPHY_PLL_LOCK) \