drivers/gpu/drm/kmb/kmb_crtc.c

78

kmb_dsi_mode_set(kmb->kmb_dsi, m, kmb->sys_clk_mhz, old_state);

drivers/gpu/drm/kmb/kmb_drv.c

128

ret = kmb_dsi_map_mmio(kmb->kmb_dsi);

drivers/gpu/drm/kmb/kmb_drv.c

191

ret = kmb_dsi_encoder_init(drm, kmb->kmb_dsi);

drivers/gpu/drm/kmb/kmb_drv.c

476

kmb_dsi_host_unregister(kmb->kmb_dsi);

drivers/gpu/drm/kmb/kmb_drv.c

536

kmb->kmb_dsi = kmb_dsi_init(dsi_pdev);

drivers/gpu/drm/kmb/kmb_drv.c

537

if (IS_ERR(kmb->kmb_dsi)) {

drivers/gpu/drm/kmb/kmb_drv.c

539

ret = PTR_ERR(kmb->kmb_dsi);

drivers/gpu/drm/kmb/kmb_drv.c

543

kmb->kmb_dsi->dev = &dsi_pdev->dev;

drivers/gpu/drm/kmb/kmb_drv.c

544

kmb->kmb_dsi->pdev = dsi_pdev;

drivers/gpu/drm/kmb/kmb_drv.c

579

kmb_dsi_host_unregister(kmb->kmb_dsi);

drivers/gpu/drm/kmb/kmb_drv.c

63

ret = kmb_dsi_clk_init(kmb->kmb_dsi);

drivers/gpu/drm/kmb/kmb_drv.h

41

struct kmb_dsi;

drivers/gpu/drm/kmb/kmb_drv.h

50

struct kmb_dsi *kmb_dsi;

drivers/gpu/drm/kmb/kmb_dsi.c

1003

test_mode_send(kmb_dsi, dphy_no, test_code, test_data);

drivers/gpu/drm/kmb/kmb_dsi.c

1008

test_mode_send(kmb_dsi, dphy_no, test_code, test_data);

drivers/gpu/drm/kmb/kmb_dsi.c

1011

static void set_slewrate_gt_1000(struct kmb_dsi *kmb_dsi, u32 dphy_no)

drivers/gpu/drm/kmb/kmb_dsi.c

1024

test_mode_send(kmb_dsi, dphy_no, test_code, test_data);

drivers/gpu/drm/kmb/kmb_dsi.c

1029

test_mode_send(kmb_dsi, dphy_no, test_code, test_data);

drivers/gpu/drm/kmb/kmb_dsi.c

1036

test_mode_send(kmb_dsi, dphy_no, test_code, test_data);

drivers/gpu/drm/kmb/kmb_dsi.c

1043

test_mode_send(kmb_dsi, dphy_no, test_code, test_data);

drivers/gpu/drm/kmb/kmb_dsi.c

1046

static void set_slewrate_lt_1000(struct kmb_dsi *kmb_dsi, u32 dphy_no)

drivers/gpu/drm/kmb/kmb_dsi.c

1059

test_mode_send(kmb_dsi, dphy_no, test_code, test_data);

drivers/gpu/drm/kmb/kmb_dsi.c

1064

test_mode_send(kmb_dsi, dphy_no, test_code, test_data);

drivers/gpu/drm/kmb/kmb_dsi.c

1069

test_mode_send(kmb_dsi, dphy_no, test_code, test_data);

drivers/gpu/drm/kmb/kmb_dsi.c

1074

test_mode_send(kmb_dsi, dphy_no, test_code, test_data);

drivers/gpu/drm/kmb/kmb_dsi.c

1077

static void setup_pll(struct kmb_dsi *kmb_dsi, u32 dphy_no,

drivers/gpu/drm/kmb/kmb_dsi.c

1085

test_mode_send(kmb_dsi, dphy_no, test_code, test_data);

drivers/gpu/drm/kmb/kmb_dsi.c

1088

mipi_tx_pll_setup(kmb_dsi, dphy_no, cfg->ref_clk_khz / 1000,

drivers/gpu/drm/kmb/kmb_dsi.c

1092

kmb_write_bits_mipi(kmb_dsi, DPHY_INIT_CTRL1, PLL_CLKSEL_0, 2, 0x01);

drivers/gpu/drm/kmb/kmb_dsi.c

1095

kmb_set_bit_mipi(kmb_dsi, DPHY_INIT_CTRL1, PLL_SHADOW_CTRL);

drivers/gpu/drm/kmb/kmb_dsi.c

1098

static void set_lane_data_rate(struct kmb_dsi *kmb_dsi, u32 dphy_no,

drivers/gpu/drm/kmb/kmb_dsi.c

1113

test_mode_send(kmb_dsi, dphy_no, test_code, test_data);

drivers/gpu/drm/kmb/kmb_dsi.c

1118

static void dphy_init_sequence(struct kmb_dsi *kmb_dsi,

drivers/gpu/drm/kmb/kmb_dsi.c

1126

CLR_DPHY_INIT_CTRL0(kmb_dsi, dphy_no, RESETZ);

drivers/gpu/drm/kmb/kmb_dsi.c

1129

CLR_DPHY_INIT_CTRL0(kmb_dsi, dphy_no, SHUTDOWNZ);

drivers/gpu/drm/kmb/kmb_dsi.c

1130

val = kmb_read_mipi(kmb_dsi, DPHY_INIT_CTRL0);

drivers/gpu/drm/kmb/kmb_dsi.c

1136

CLR_DPHY_TEST_CTRL0(kmb_dsi, dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

1138

SET_DPHY_TEST_CTRL0(kmb_dsi, dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

1140

CLR_DPHY_TEST_CTRL0(kmb_dsi, dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

1153

test_mode_send(kmb_dsi, dphy_no, test_code, test_data);

drivers/gpu/drm/kmb/kmb_dsi.c

1156

set_lane_data_rate(kmb_dsi, dphy_no, cfg);

drivers/gpu/drm/kmb/kmb_dsi.c

1162

set_slewrate_gt_1500(kmb_dsi, dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

1164

set_slewrate_gt_1000(kmb_dsi, dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

1166

set_slewrate_lt_1000(kmb_dsi, dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

1170

SET_DPHY_FREQ_CTRL0_3(kmb_dsi, dphy_no, val);

drivers/gpu/drm/kmb/kmb_dsi.c

1173

kmb_set_bit_mipi(kmb_dsi, DPHY_CFG_CLK_EN, dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

1177

setup_pll(kmb_dsi, dphy_no, cfg);

drivers/gpu/drm/kmb/kmb_dsi.c

1182

test_mode_send(kmb_dsi, dphy_no, test_code, test_data);

drivers/gpu/drm/kmb/kmb_dsi.c

1191

kmb_write_bits_mipi(kmb_dsi, DPHY_INIT_CTRL2, 0, 9, 0x03f);

drivers/gpu/drm/kmb/kmb_dsi.c

1198

kmb_set_bit_mipi(kmb_dsi, DPHY_INIT_CTRL2, 12 + dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

1201

kmb_write_bits_mipi(kmb_dsi, DPHY_ENABLE, dphy_no * 2, 2,

drivers/gpu/drm/kmb/kmb_dsi.c

1208

SET_DPHY_INIT_CTRL0(kmb_dsi, dphy_no, SHUTDOWNZ);

drivers/gpu/drm/kmb/kmb_dsi.c

1212

SET_DPHY_INIT_CTRL0(kmb_dsi, dphy_no, RESETZ);

drivers/gpu/drm/kmb/kmb_dsi.c

1215

static void dphy_wait_fsm(struct kmb_dsi *kmb_dsi, u32 dphy_no,

drivers/gpu/drm/kmb/kmb_dsi.c

1223

test_mode_send(kmb_dsi, dphy_no, TEST_CODE_FSM_CONTROL, 0x80);

drivers/gpu/drm/kmb/kmb_dsi.c

1225

val = GET_TEST_DOUT4_7(kmb_dsi, dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

1233

dev_dbg(kmb_dsi->dev, "%s: dphy %d val = %x", __func__, dphy_no, val);

drivers/gpu/drm/kmb/kmb_dsi.c

1234

dev_dbg(kmb_dsi->dev, "* DPHY %d WAIT_FSM %s *",

drivers/gpu/drm/kmb/kmb_dsi.c

1238

static void wait_init_done(struct kmb_dsi *kmb_dsi, u32 dphy_no,

drivers/gpu/drm/kmb/kmb_dsi.c

1247

stopstatedata = GET_STOPSTATE_DATA(kmb_dsi, dphy_no)

drivers/gpu/drm/kmb/kmb_dsi.c

1255

dev_dbg(kmb_dsi->dev,

drivers/gpu/drm/kmb/kmb_dsi.c

1257

kmb_read_mipi(kmb_dsi, MIPI_DPHY_ERR_STAT6_7));

drivers/gpu/drm/kmb/kmb_dsi.c

1262

dev_dbg(kmb_dsi->dev, "* DPHY %d INIT - %s *",

drivers/gpu/drm/kmb/kmb_dsi.c

1266

static void wait_pll_lock(struct kmb_dsi *kmb_dsi, u32 dphy_no)

drivers/gpu/drm/kmb/kmb_dsi.c

1276

dev_dbg(kmb_dsi->dev, "%s: timing out", __func__);

drivers/gpu/drm/kmb/kmb_dsi.c

1279

} while (!GET_PLL_LOCK(kmb_dsi, dphy_no));

drivers/gpu/drm/kmb/kmb_dsi.c

1281

dev_dbg(kmb_dsi->dev, "* PLL Locked for DPHY %d - %s *",

drivers/gpu/drm/kmb/kmb_dsi.c

1285

static u32 mipi_tx_init_dphy(struct kmb_dsi *kmb_dsi,

drivers/gpu/drm/kmb/kmb_dsi.c

1308

dphy_init_sequence(kmb_dsi, cfg, dphy_no + 1,

drivers/gpu/drm/kmb/kmb_dsi.c

1311

dphy_wait_fsm(kmb_dsi, dphy_no + 1, DPHY_TX_LOCK);

drivers/gpu/drm/kmb/kmb_dsi.c

1314

dphy_init_sequence(kmb_dsi, cfg, dphy_no, MIPI_DPHY_D_LANES,

drivers/gpu/drm/kmb/kmb_dsi.c

1318

wait_init_done(kmb_dsi, dphy_no, MIPI_DPHY_D_LANES);

drivers/gpu/drm/kmb/kmb_dsi.c

1319

wait_init_done(kmb_dsi, dphy_no + 1,

drivers/gpu/drm/kmb/kmb_dsi.c

1321

wait_pll_lock(kmb_dsi, dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

1322

wait_pll_lock(kmb_dsi, dphy_no + 1);

drivers/gpu/drm/kmb/kmb_dsi.c

1323

dphy_wait_fsm(kmb_dsi, dphy_no, DPHY_TX_IDLE);

drivers/gpu/drm/kmb/kmb_dsi.c

1325

dphy_init_sequence(kmb_dsi, cfg, dphy_no, cfg->active_lanes,

drivers/gpu/drm/kmb/kmb_dsi.c

1327

dphy_wait_fsm(kmb_dsi, dphy_no, DPHY_TX_IDLE);

drivers/gpu/drm/kmb/kmb_dsi.c

1328

wait_init_done(kmb_dsi, dphy_no, cfg->active_lanes);

drivers/gpu/drm/kmb/kmb_dsi.c

1329

wait_pll_lock(kmb_dsi, dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

1335

static void connect_lcd_to_mipi(struct kmb_dsi *kmb_dsi,

drivers/gpu/drm/kmb/kmb_dsi.c

1342

dev_dbg(kmb_dsi->dev, "failed to get msscam syscon");

drivers/gpu/drm/kmb/kmb_dsi.c

1355

int kmb_dsi_mode_set(struct kmb_dsi *kmb_dsi, struct drm_display_mode *mode,

drivers/gpu/drm/kmb/kmb_dsi.c

1360

kmb_dsi->sys_clk_mhz = sys_clk_mhz;

drivers/gpu/drm/kmb/kmb_dsi.c

1385

dev_dbg(kmb_dsi->dev, "data_rate=%u active_lanes=%d\n",

drivers/gpu/drm/kmb/kmb_dsi.c

1399

mipi_tx_init_cntrl(kmb_dsi, &mipi_tx_init_cfg);

drivers/gpu/drm/kmb/kmb_dsi.c

1402

mipi_tx_init_dphy(kmb_dsi, &mipi_tx_init_cfg);

drivers/gpu/drm/kmb/kmb_dsi.c

1404

connect_lcd_to_mipi(kmb_dsi, old_state);

drivers/gpu/drm/kmb/kmb_dsi.c

1405

dev_info(kmb_dsi->dev, "mipi hw initialized");

drivers/gpu/drm/kmb/kmb_dsi.c

1410

struct kmb_dsi *kmb_dsi_init(struct platform_device *pdev)

drivers/gpu/drm/kmb/kmb_dsi.c

1412

struct kmb_dsi *kmb_dsi;

drivers/gpu/drm/kmb/kmb_dsi.c

1415

kmb_dsi = devm_kzalloc(dev, sizeof(*kmb_dsi), GFP_KERNEL);

drivers/gpu/drm/kmb/kmb_dsi.c

1416

if (!kmb_dsi) {

drivers/gpu/drm/kmb/kmb_dsi.c

1421

kmb_dsi->host = dsi_host;

drivers/gpu/drm/kmb/kmb_dsi.c

1422

kmb_dsi->host->ops = &kmb_dsi_host_ops;

drivers/gpu/drm/kmb/kmb_dsi.c

1424

dsi_device->host = kmb_dsi->host;

drivers/gpu/drm/kmb/kmb_dsi.c

1425

kmb_dsi->device = dsi_device;

drivers/gpu/drm/kmb/kmb_dsi.c

1427

return kmb_dsi;

drivers/gpu/drm/kmb/kmb_dsi.c

1430

int kmb_dsi_encoder_init(struct drm_device *dev, struct kmb_dsi *kmb_dsi)

drivers/gpu/drm/kmb/kmb_dsi.c

1436

encoder = &kmb_dsi->base;

drivers/gpu/drm/kmb/kmb_dsi.c

1442

dev_err(kmb_dsi->dev, "Failed to init encoder %d\n", ret);

drivers/gpu/drm/kmb/kmb_dsi.c

1464

int kmb_dsi_map_mmio(struct kmb_dsi *kmb_dsi)

drivers/gpu/drm/kmb/kmb_dsi.c

1467

struct device *dev = kmb_dsi->dev;

drivers/gpu/drm/kmb/kmb_dsi.c

1469

res = platform_get_resource_byname(kmb_dsi->pdev, IORESOURCE_MEM,

drivers/gpu/drm/kmb/kmb_dsi.c

1475

kmb_dsi->mipi_mmio = devm_ioremap_resource(dev, res);

drivers/gpu/drm/kmb/kmb_dsi.c

1476

if (IS_ERR(kmb_dsi->mipi_mmio)) {

drivers/gpu/drm/kmb/kmb_dsi.c

1478

return PTR_ERR(kmb_dsi->mipi_mmio);

drivers/gpu/drm/kmb/kmb_dsi.c

1483

static int kmb_dsi_clk_enable(struct kmb_dsi *kmb_dsi)

drivers/gpu/drm/kmb/kmb_dsi.c

1486

struct device *dev = kmb_dsi->dev;

drivers/gpu/drm/kmb/kmb_dsi.c

1488

ret = clk_prepare_enable(kmb_dsi->clk_mipi);

drivers/gpu/drm/kmb/kmb_dsi.c

1494

ret = clk_prepare_enable(kmb_dsi->clk_mipi_ecfg);

drivers/gpu/drm/kmb/kmb_dsi.c

1500

ret = clk_prepare_enable(kmb_dsi->clk_mipi_cfg);

drivers/gpu/drm/kmb/kmb_dsi.c

1510

int kmb_dsi_clk_init(struct kmb_dsi *kmb_dsi)

drivers/gpu/drm/kmb/kmb_dsi.c

1512

struct device *dev = kmb_dsi->dev;

drivers/gpu/drm/kmb/kmb_dsi.c

1515

kmb_dsi->clk_mipi = devm_clk_get(dev, "clk_mipi");

drivers/gpu/drm/kmb/kmb_dsi.c

1516

if (IS_ERR(kmb_dsi->clk_mipi)) {

drivers/gpu/drm/kmb/kmb_dsi.c

1518

return PTR_ERR(kmb_dsi->clk_mipi);

drivers/gpu/drm/kmb/kmb_dsi.c

1521

kmb_dsi->clk_mipi_ecfg = devm_clk_get(dev, "clk_mipi_ecfg");

drivers/gpu/drm/kmb/kmb_dsi.c

1522

if (IS_ERR(kmb_dsi->clk_mipi_ecfg)) {

drivers/gpu/drm/kmb/kmb_dsi.c

1524

return PTR_ERR(kmb_dsi->clk_mipi_ecfg);

drivers/gpu/drm/kmb/kmb_dsi.c

1527

kmb_dsi->clk_mipi_cfg = devm_clk_get(dev, "clk_mipi_cfg");

drivers/gpu/drm/kmb/kmb_dsi.c

1528

if (IS_ERR(kmb_dsi->clk_mipi_cfg)) {

drivers/gpu/drm/kmb/kmb_dsi.c

1530

return PTR_ERR(kmb_dsi->clk_mipi_cfg);

drivers/gpu/drm/kmb/kmb_dsi.c

1533

clk_set_rate(kmb_dsi->clk_mipi, KMB_MIPI_DEFAULT_CLK);

drivers/gpu/drm/kmb/kmb_dsi.c

1534

if (clk_get_rate(kmb_dsi->clk_mipi) != KMB_MIPI_DEFAULT_CLK) {

drivers/gpu/drm/kmb/kmb_dsi.c

1539

dev_dbg(dev, "clk_mipi = %ld\n", clk_get_rate(kmb_dsi->clk_mipi));

drivers/gpu/drm/kmb/kmb_dsi.c

1541

clk = clk_get_rate(kmb_dsi->clk_mipi_ecfg);

drivers/gpu/drm/kmb/kmb_dsi.c

1544

clk_set_rate(kmb_dsi->clk_mipi_ecfg, KMB_MIPI_DEFAULT_CFG_CLK);

drivers/gpu/drm/kmb/kmb_dsi.c

1545

clk = clk_get_rate(kmb_dsi->clk_mipi_ecfg);

drivers/gpu/drm/kmb/kmb_dsi.c

1553

clk = clk_get_rate(kmb_dsi->clk_mipi_cfg);

drivers/gpu/drm/kmb/kmb_dsi.c

1556

clk_set_rate(kmb_dsi->clk_mipi_cfg, 24000000);

drivers/gpu/drm/kmb/kmb_dsi.c

1557

clk = clk_get_rate(kmb_dsi->clk_mipi_cfg);

drivers/gpu/drm/kmb/kmb_dsi.c

1565

return kmb_dsi_clk_enable(kmb_dsi);

drivers/gpu/drm/kmb/kmb_dsi.c

176

static void kmb_dsi_clk_disable(struct kmb_dsi *kmb_dsi)

drivers/gpu/drm/kmb/kmb_dsi.c

178

clk_disable_unprepare(kmb_dsi->clk_mipi);

drivers/gpu/drm/kmb/kmb_dsi.c

179

clk_disable_unprepare(kmb_dsi->clk_mipi_ecfg);

drivers/gpu/drm/kmb/kmb_dsi.c

180

clk_disable_unprepare(kmb_dsi->clk_mipi_cfg);

drivers/gpu/drm/kmb/kmb_dsi.c

183

void kmb_dsi_host_unregister(struct kmb_dsi *kmb_dsi)

drivers/gpu/drm/kmb/kmb_dsi.c

185

kmb_dsi_clk_disable(kmb_dsi);

drivers/gpu/drm/kmb/kmb_dsi.c

186

mipi_dsi_host_unregister(kmb_dsi->host);

drivers/gpu/drm/kmb/kmb_dsi.c

385

static u32 mipi_tx_fg_section_cfg_regs(struct kmb_dsi *kmb_dsi,

drivers/gpu/drm/kmb/kmb_dsi.c

412

dev_dbg(kmb_dsi->dev,

drivers/gpu/drm/kmb/kmb_dsi.c

415

kmb_write_mipi(kmb_dsi,

drivers/gpu/drm/kmb/kmb_dsi.c

430

kmb_write_bits_mipi(kmb_dsi, reg_adr, (section % 2) * 16, 16,

drivers/gpu/drm/kmb/kmb_dsi.c

432

dev_dbg(kmb_dsi->dev,

drivers/gpu/drm/kmb/kmb_dsi.c

438

kmb_write_mipi(kmb_dsi, reg_adr, height_lines);

drivers/gpu/drm/kmb/kmb_dsi.c

442

static u32 mipi_tx_fg_section_cfg(struct kmb_dsi *kmb_dsi,

drivers/gpu/drm/kmb/kmb_dsi.c

476

mipi_tx_fg_section_cfg_regs(kmb_dsi, frame_id, section,

drivers/gpu/drm/kmb/kmb_dsi.c

490

static void mipi_tx_fg_cfg_regs(struct kmb_dsi *kmb_dsi, u8 frame_gen,

drivers/gpu/drm/kmb/kmb_dsi.c

500

if (kmb_dsi->sys_clk_mhz == SYSCLK_500) {

drivers/gpu/drm/kmb/kmb_dsi.c

501

sysclk = kmb_dsi->sys_clk_mhz - CLK_DIFF_LOW;

drivers/gpu/drm/kmb/kmb_dsi.c

504

sysclk = kmb_dsi->sys_clk_mhz - CLK_DIFF_HI;

drivers/gpu/drm/kmb/kmb_dsi.c

517

dev_dbg(kmb_dsi->dev, "ppl_llp_ratio=%d\n", ppl_llp_ratio);

drivers/gpu/drm/kmb/kmb_dsi.c

518

dev_dbg(kmb_dsi->dev, "bpp=%d sysclk=%d lane-rate=%d active-lanes=%d\n",

drivers/gpu/drm/kmb/kmb_dsi.c

524

kmb_write_mipi(kmb_dsi, reg_adr, fg_cfg->v_active);

drivers/gpu/drm/kmb/kmb_dsi.c

534

kmb_write_bits_mipi(kmb_dsi, reg_adr, offset, 16, fg_cfg->vsync_width);

drivers/gpu/drm/kmb/kmb_dsi.c

538

kmb_write_bits_mipi(kmb_dsi, reg_adr, offset, 16, fg_cfg->v_backporch);

drivers/gpu/drm/kmb/kmb_dsi.c

542

kmb_write_bits_mipi(kmb_dsi, reg_adr, offset, 16, fg_cfg->v_frontporch);

drivers/gpu/drm/kmb/kmb_dsi.c

546

kmb_write_bits_mipi(kmb_dsi, reg_adr, offset, 16, fg_cfg->v_active);

drivers/gpu/drm/kmb/kmb_dsi.c

550

kmb_write_mipi(kmb_dsi, reg_adr,

drivers/gpu/drm/kmb/kmb_dsi.c

555

kmb_write_mipi(kmb_dsi, reg_adr,

drivers/gpu/drm/kmb/kmb_dsi.c

560

kmb_write_mipi(kmb_dsi, reg_adr,

drivers/gpu/drm/kmb/kmb_dsi.c

570

kmb_write_mipi(kmb_dsi, reg_adr, val);

drivers/gpu/drm/kmb/kmb_dsi.c

574

kmb_write_mipi(kmb_dsi, reg_adr, fg_cfg->hsync_width * (fg_cfg->bpp / 8));

drivers/gpu/drm/kmb/kmb_dsi.c

578

kmb_write_mipi(kmb_dsi, reg_adr, fg_cfg->h_backporch * (fg_cfg->bpp / 8));

drivers/gpu/drm/kmb/kmb_dsi.c

582

kmb_write_mipi(kmb_dsi, reg_adr,

drivers/gpu/drm/kmb/kmb_dsi.c

586

static void mipi_tx_fg_cfg(struct kmb_dsi *kmb_dsi, u8 frame_gen,

drivers/gpu/drm/kmb/kmb_dsi.c

614

mipi_tx_fg_cfg_regs(kmb_dsi, frame_gen, &fg_t_cfg);

drivers/gpu/drm/kmb/kmb_dsi.c

617

static void mipi_tx_multichannel_fifo_cfg(struct kmb_dsi *kmb_dsi,

drivers/gpu/drm/kmb/kmb_dsi.c

624

kmb_write_mipi(kmb_dsi, MIPI_TX_HS_MC_FIFO_CTRL_EN, 0);

drivers/gpu/drm/kmb/kmb_dsi.c

625

kmb_write_mipi(kmb_dsi, MIPI_TX_HS_MC_FIFO_CHAN_ALLOC0, 0);

drivers/gpu/drm/kmb/kmb_dsi.c

626

kmb_write_mipi(kmb_dsi, MIPI_TX_HS_MC_FIFO_CHAN_ALLOC1, 0);

drivers/gpu/drm/kmb/kmb_dsi.c

627

kmb_write_mipi(kmb_dsi, MIPI_TX_HS_MC_FIFO_RTHRESHOLD0, 0);

drivers/gpu/drm/kmb/kmb_dsi.c

628

kmb_write_mipi(kmb_dsi, MIPI_TX_HS_MC_FIFO_RTHRESHOLD1, 0);

drivers/gpu/drm/kmb/kmb_dsi.c

638

SET_MC_FIFO_CHAN_ALLOC(kmb_dsi, ctrl_no, vchannel_id, fifo_size);

drivers/gpu/drm/kmb/kmb_dsi.c

642

SET_MC_FIFO_RTHRESHOLD(kmb_dsi, ctrl_no, vchannel_id, fifo_rthreshold);

drivers/gpu/drm/kmb/kmb_dsi.c

645

kmb_set_bit_mipi(kmb_dsi, MIPI_TXm_HS_MC_FIFO_CTRL_EN(ctrl_no),

drivers/gpu/drm/kmb/kmb_dsi.c

649

static void mipi_tx_ctrl_cfg(struct kmb_dsi *kmb_dsi, u8 fg_id,

drivers/gpu/drm/kmb/kmb_dsi.c

686

dev_dbg(kmb_dsi->dev, "sync_cfg=%d fg_en=%d\n", sync_cfg, fg_en);

drivers/gpu/drm/kmb/kmb_dsi.c

702

kmb_write_mipi(kmb_dsi, MIPI_TXm_HS_SYNC_CFG(ctrl_no), sync_cfg);

drivers/gpu/drm/kmb/kmb_dsi.c

703

kmb_write_mipi(kmb_dsi, MIPI_TXm_HS_CTRL(ctrl_no), ctrl);

drivers/gpu/drm/kmb/kmb_dsi.c

706

static u32 mipi_tx_init_cntrl(struct kmb_dsi *kmb_dsi,

drivers/gpu/drm/kmb/kmb_dsi.c

739

ret = mipi_tx_fg_section_cfg(kmb_dsi, frame_id, sect,

drivers/gpu/drm/kmb/kmb_dsi.c

748

mipi_tx_fg_cfg(kmb_dsi, frame_id, ctrl_cfg->active_lanes,

drivers/gpu/drm/kmb/kmb_dsi.c

763

mipi_tx_multichannel_fifo_cfg(kmb_dsi, ctrl_cfg->active_lanes, frame_id);

drivers/gpu/drm/kmb/kmb_dsi.c

766

mipi_tx_ctrl_cfg(kmb_dsi, frame_id, ctrl_cfg);

drivers/gpu/drm/kmb/kmb_dsi.c

771

static void test_mode_send(struct kmb_dsi *kmb_dsi, u32 dphy_no,

drivers/gpu/drm/kmb/kmb_dsi.c

783

SET_DPHY_TEST_CTRL1_CLK(kmb_dsi, dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

786

SET_TEST_DIN0_3(kmb_dsi, dphy_no, test_code);

drivers/gpu/drm/kmb/kmb_dsi.c

789

SET_DPHY_TEST_CTRL1_EN(kmb_dsi, dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

792

CLR_DPHY_TEST_CTRL1_CLK(kmb_dsi, dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

795

CLR_DPHY_TEST_CTRL1_EN(kmb_dsi, dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

806

CLR_DPHY_TEST_CTRL1_EN(kmb_dsi, dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

809

CLR_DPHY_TEST_CTRL1_CLK(kmb_dsi, dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

812

kmb_write_mipi(kmb_dsi,

drivers/gpu/drm/kmb/kmb_dsi.c

817

SET_DPHY_TEST_CTRL1_CLK(kmb_dsi, dphy_no);

drivers/gpu/drm/kmb/kmb_dsi.c

822

set_test_mode_src_osc_freq_target_low_bits(struct kmb_dsi *kmb_dsi,

drivers/gpu/drm/kmb/kmb_dsi.c

829

test_mode_send(kmb_dsi, dphy_no, TEST_CODE_SLEW_RATE_DDL_CYCLES,

drivers/gpu/drm/kmb/kmb_dsi.c

834

set_test_mode_src_osc_freq_target_hi_bits(struct kmb_dsi *kmb_dsi,

drivers/gpu/drm/kmb/kmb_dsi.c

846

test_mode_send(kmb_dsi, dphy_no, TEST_CODE_SLEW_RATE_DDL_CYCLES, data);

drivers/gpu/drm/kmb/kmb_dsi.c

863

static void mipi_tx_pll_setup(struct kmb_dsi *kmb_dsi, u32 dphy_no,

drivers/gpu/drm/kmb/kmb_dsi.c

932

test_mode_send(kmb_dsi, dphy_no, TEST_CODE_PLL_VCO_CTRL, (vco_p.range

drivers/gpu/drm/kmb/kmb_dsi.c

936

dev_dbg(kmb_dsi->dev, "m = %d n = %d\n", best_m, best_n);

drivers/gpu/drm/kmb/kmb_dsi.c

939

test_mode_send(kmb_dsi, dphy_no, TEST_CODE_PLL_INPUT_DIVIDER,

drivers/gpu/drm/kmb/kmb_dsi.c

945

test_mode_send(kmb_dsi, dphy_no, TEST_CODE_PLL_FEEDBACK_DIVIDER,

drivers/gpu/drm/kmb/kmb_dsi.c

951

test_mode_send(kmb_dsi, dphy_no, TEST_CODE_PLL_FEEDBACK_DIVIDER,

drivers/gpu/drm/kmb/kmb_dsi.c

955

test_mode_send(kmb_dsi, dphy_no, TEST_CODE_PLL_OUTPUT_CLK_SEL,

drivers/gpu/drm/kmb/kmb_dsi.c

962

test_mode_send(kmb_dsi, dphy_no,

drivers/gpu/drm/kmb/kmb_dsi.c

967

test_mode_send(kmb_dsi, dphy_no, TEST_CODE_PLL_INTEGRAL_CHARGE_PUMP_CTRL,

drivers/gpu/drm/kmb/kmb_dsi.c

971

test_mode_send(kmb_dsi, dphy_no, TEST_CODE_PLL_GMP_CTRL, 0x10);

drivers/gpu/drm/kmb/kmb_dsi.c

974

test_mode_send(kmb_dsi, dphy_no, TEST_CODE_PLL_CHARGE_PUMP_BIAS, 0x10);

drivers/gpu/drm/kmb/kmb_dsi.c

979

test_mode_send(kmb_dsi, dphy_no, TEST_CODE_PLL_PHASE_ERR_CTRL, 0x02);

drivers/gpu/drm/kmb/kmb_dsi.c

984

test_mode_send(kmb_dsi, dphy_no, TEST_CODE_PLL_LOCK_FILTER, 0x60);

drivers/gpu/drm/kmb/kmb_dsi.c

987

test_mode_send(kmb_dsi, dphy_no, TEST_CODE_PLL_UNLOCK_FILTER, 0x03);

drivers/gpu/drm/kmb/kmb_dsi.c

992

test_mode_send(kmb_dsi, dphy_no, TEST_CODE_PLL_LOCK_DETECTOR, 0x02);

drivers/gpu/drm/kmb/kmb_dsi.c

995

static void set_slewrate_gt_1500(struct kmb_dsi *kmb_dsi, u32 dphy_no)

drivers/gpu/drm/kmb/kmb_dsi.h

338

static inline void kmb_write_mipi(struct kmb_dsi *kmb_dsi,

drivers/gpu/drm/kmb/kmb_dsi.h

341

writel(value, (kmb_dsi->mipi_mmio + reg));

drivers/gpu/drm/kmb/kmb_dsi.h

344

static inline u32 kmb_read_mipi(struct kmb_dsi *kmb_dsi, unsigned int reg)

drivers/gpu/drm/kmb/kmb_dsi.h

346

return readl(kmb_dsi->mipi_mmio + reg);

drivers/gpu/drm/kmb/kmb_dsi.h

349

static inline void kmb_write_bits_mipi(struct kmb_dsi *kmb_dsi,

drivers/gpu/drm/kmb/kmb_dsi.h

353

u32 reg_val = kmb_read_mipi(kmb_dsi, reg);

drivers/gpu/drm/kmb/kmb_dsi.h

360

kmb_write_mipi(kmb_dsi, reg, reg_val);

drivers/gpu/drm/kmb/kmb_dsi.h

363

static inline void kmb_set_bit_mipi(struct kmb_dsi *kmb_dsi,

drivers/gpu/drm/kmb/kmb_dsi.h

366

u32 reg_val = kmb_read_mipi(kmb_dsi, reg);

drivers/gpu/drm/kmb/kmb_dsi.h

368

kmb_write_mipi(kmb_dsi, reg, reg_val | (1 << offset));

drivers/gpu/drm/kmb/kmb_dsi.h

371

static inline void kmb_clr_bit_mipi(struct kmb_dsi *kmb_dsi,

drivers/gpu/drm/kmb/kmb_dsi.h

374

u32 reg_val = kmb_read_mipi(kmb_dsi, reg);

drivers/gpu/drm/kmb/kmb_dsi.h

376

kmb_write_mipi(kmb_dsi, reg, reg_val & (~(1 << offset)));

drivers/gpu/drm/kmb/kmb_dsi.h

380

struct kmb_dsi *kmb_dsi_init(struct platform_device *pdev);

drivers/gpu/drm/kmb/kmb_dsi.h

381

void kmb_dsi_host_unregister(struct kmb_dsi *kmb_dsi);

drivers/gpu/drm/kmb/kmb_dsi.h

382

int kmb_dsi_mode_set(struct kmb_dsi *kmb_dsi, struct drm_display_mode *mode,

drivers/gpu/drm/kmb/kmb_dsi.h

384

int kmb_dsi_map_mmio(struct kmb_dsi *kmb_dsi);

drivers/gpu/drm/kmb/kmb_dsi.h

385

int kmb_dsi_clk_init(struct kmb_dsi *kmb_dsi);

drivers/gpu/drm/kmb/kmb_dsi.h

386

int kmb_dsi_encoder_init(struct drm_device *dev, struct kmb_dsi *kmb_dsi);

drivers/gpu/drm/kmb/kmb_dsi.h

65

#define to_kmb_dsi(x) container_of(x, struct kmb_dsi, base)