CLK_I2S
CLK_I2S, "i2s", i2s_parents, ARRAY_SIZE(i2s_parents),
CLK_I2S, "i2s", i2s_parents, ARRAY_SIZE(i2s_parents),
CLK_I2S, "i2s", i2s_parents, ARRAY_SIZE(i2s_parents),
CLK_I2S, "i2s", i2s_parents, ARRAY_SIZE(i2s_parents),
GATE(CLK_I2S, "i2s", "i2s_div", 0x104, 3),
GATE(CLK_I2S, "i2s", "div_aclk_100", GATE_IP_PERIL, 21, 0, 0),
clk_table[CLK_I2S] = clk_hw_register_gate(NULL, "i2s_audss",
[CLK_I2S] = &i2s_clk.common.hw,
[CLK_I2S] = &i2s_clk.common.hw,
[CLK_I2S] = &i2s_clk.common.hw,