CLK_I2C5
[CLK_I2C5] = &i2c5_clk.common.hw,
COMPOSITE_NODIV(CLK_I2C5, "clk_i2c5", mux_200m_100m_50m_24m_p, 0,
GATE(CLK_I2C5, "clk_i2c5", "clk_i2c", 0,
GATE(CLK_I2C5, "clk_i2c5", "clk_i2c", 0,
COMPOSITE_NODIV(CLK_I2C5, "clk_i2c5", mux_200m_100m_50m_24m_p, 0,
COMPOSITE_NODIV(CLK_I2C5, "clk_i2c5", mux_200m_100m_p, 0,
COMPOSITE_NOMUX(CLK_I2C5, "clk_i2c5", "gpll", 0,
GATE(CLK_I2C5, "clk_i2c5", "clk_i2c_bus_src", 0,
GATE(CLK_I2C5, "i2c5", "div_aclk_100", GATE_IP_PERIL, 11, 0, 0),
GATE(CLK_I2C5, "i2c5", "aclk100", GATE_IP_PERIL, 11,
GATE(CLK_I2C5, "i2c5", "div_aclk66", GATE_IP_PERIC, 11, 0, 0),
[CLK_I2C5] = &i2c5_clk.common.hw,
static CCU_GATE(CLK_I2C5, i2c5_clk, "i2c5", perisys_apb_pclk_pd, 0x204, 0, 0);