CLK_I2C4
[CLK_I2C4] = &i2c4_clk.common.hw,
CLK_I2C4, "i2c4",
CLK_I2C4, "i2c4",
COMPOSITE_NODIV(CLK_I2C4, "clk_i2c4", mux_200m_100m_50m_24m_p, 0,
GATE(CLK_I2C4, "clk_i2c4", "clk_i2c", 0,
GATE(CLK_I2C4, "clk_i2c4", "clk_i2c", 0,
COMPOSITE_NODIV(CLK_I2C4, "clk_i2c4", mux_200m_100m_50m_24m_p, 0,
COMPOSITE_NODIV(CLK_I2C4, "clk_i2c4", mux_200m_100m_p, 0,
COMPOSITE_NOMUX(CLK_I2C4, "clk_i2c4", "gpll", 0,
GATE(CLK_I2C4, "clk_i2c4", "clk_i2c_bus_src", 0,
GATE(CLK_I2C4, "i2c4", "div_aclk_100", GATE_IP_PERIL, 10, 0, 0),
GATE(CLK_I2C4, "i2c4", "aclk100", GATE_IP_PERIL, 10,
GATE(CLK_I2C4, "i2c4", "div_aclk66", GATE_IP_PERIC, 10, 0, 0),
[CLK_I2C4] = &i2c4_clk.common.hw,
static CCU_GATE(CLK_I2C4, i2c4_clk, "i2c4", perisys_apb_pclk_pd, 0x204, 1, 0);