CLK_I2C2
[CLK_I2C2] = &i2c2_clk.common.hw,
[CLK_I2C2] = &clk_i2c2.common.hw,
[CLK_I2C2] = &i2c2_clk.common.hw,
CLK_I2C2, "i2c2",
CLK_I2C2, "i2c2",
COMPOSITE(CLK_I2C2, "clk_i2c2", xin24m_g_gpll_v0pll_v1pll_div_parents_p, 0,
COMPOSITE_NODIV(CLK_I2C2, "clk_i2c2", clk_i2c2_p, 0,
GATE(CLK_I2C2, "clk_i2c2", "clk_i2c", 0,
GATE(CLK_I2C2, "clk_i2c2", "clk_i2c", 0,
COMPOSITE_NODIV(CLK_I2C2, "clk_i2c2", mux_200m_100m_50m_24m_p, 0,
COMPOSITE_NODIV(CLK_I2C2, "clk_i2c2", mux_200m_100m_p, 0,
COMPOSITE_NOMUX(CLK_I2C2, "clk_i2c2", "gpll", 0,
COMPOSITE(CLK_I2C2, "clk_i2c2", mux_24m_rcosc_buspmu_p, 0,
GATE(CLK_I2C2, "i2c2", "div_aclk_100", GATE_IP_PERIL, 8, 0, 0),
GATE(CLK_I2C2, "i2c2", "aclk100", GATE_IP_PERIL, 8,
GATE(CLK_I2C2, "i2c2", "div_aclk66", GATE_IP_PERIC, 8, 0, 0),
GATE(CLK_I2C2, "i2c2", "aclk66", GATE_IP_PERIC, 8, 0, 0),
GATE(CLK_I2C2, "i2c2", "mout_user_aclk66_peric",
GATE(CLK_I2C2, "i2c2", "dout_pclkp", CLK_GATE_IP3, 9, 0, 0),
[CLK_I2C2] = &i2c2_clk.common.hw,
static CCU_GATE(CLK_I2C2, i2c2_clk, "i2c2", perisys_apb_pclk_pd, 0x204, 3, 0);
K210_FUNC(CLK_I2C2, OUT),