CLK_HW_INIT_NO_PARENT
.hw.init = CLK_HW_INIT_NO_PARENT("dummy", &omap1_clk_null_ops, 0),
.hw.init = CLK_HW_INIT_NO_PARENT("usb_clko", &omap1_clk_full_ops, 0),
.hw.init = CLK_HW_INIT_NO_PARENT("usb_hhc_ck", &omap1_clk_full_ops, 0),
.hw.init = CLK_HW_INIT_NO_PARENT("usb_hhc_ck", &omap1_clk_full_ops, 0),
.hw.init = CLK_HW_INIT_NO_PARENT("usb_dc_ck", &omap1_clk_full_ops, 0),
.hw.init = CLK_HW_INIT_NO_PARENT("uart1_ck", &omap1_clk_full_ops, 0),
.hw.init = CLK_HW_INIT_NO_PARENT("uart2_ck", &omap1_clk_full_ops, 0),
.hw.init = CLK_HW_INIT_NO_PARENT("mclk", &omap1_clk_full_ops, 0),
.hw.init = CLK_HW_INIT_NO_PARENT("mclk", &omap1_clk_full_ops, 0),
.hw.init = CLK_HW_INIT_NO_PARENT("bclk", &omap1_clk_rate_ops, 0),
.hw.init = CLK_HW_INIT_NO_PARENT("bclk", &omap1_clk_full_ops, 0),
.hw.init = CLK_HW_INIT_NO_PARENT("ck_ref", &omap1_clk_rate_ops, 0),
.hw.init = CLK_HW_INIT_NO_PARENT(_name, \
.hw.init = CLK_HW_INIT_NO_PARENT(_name, \
.hw.init = CLK_HW_INIT_NO_PARENT(_name, \
clk->clk_gpio.hw.init = CLK_HW_INIT_NO_PARENT(clk_name, ops, 0);
CLK_HW_INIT_NO_PARENT("root-parent",
ctx->mux_ctx.parents_ctx[0].hw.init = CLK_HW_INIT_NO_PARENT("parent-0",
ctx->mux_ctx.parents_ctx[1].hw.init = CLK_HW_INIT_NO_PARENT("parent-1",
ctx->mux_ctx.parents_ctx[0].hw.init = CLK_HW_INIT_NO_PARENT("parent-0",
ctx->mux_ctx.parents_ctx[1].hw.init = CLK_HW_INIT_NO_PARENT("parent-1",
ctx->parents_ctx[0].hw.init = CLK_HW_INIT_NO_PARENT("parent-0",
ctx->parents_ctx[1].hw.init = CLK_HW_INIT_NO_PARENT("parent-1",
parent_hw->init = CLK_HW_INIT_NO_PARENT("parent-clk",
ctx->hw.init = CLK_HW_INIT_NO_PARENT("test-clk",
ctx->parents_ctx[0].hw.init = CLK_HW_INIT_NO_PARENT("parent-0",
ctx->parents_ctx[1].hw.init = CLK_HW_INIT_NO_PARENT("parent-1",
ctx->parents_ctx[1].hw.init = CLK_HW_INIT_NO_PARENT("proper-parent",
CLK_HW_INIT_NO_PARENT("parent-clk",
.hw.init = CLK_HW_INIT_NO_PARENT("iosc", &ccu_iosc_ops,