jsm_dbg
jsm_dbg(IOCTL, &ch->ch_bd->pci_dev,
jsm_dbg(MSIGS, &ch->ch_bd->pci_dev,
jsm_dbg(MSIGS, &ch->ch_bd->pci_dev,
jsm_dbg(IOCTL, &ch->ch_bd->pci_dev,
jsm_dbg(INTR, &brd->pci_dev, "%s:%d uart_poll: %x\n",
jsm_dbg(INTR, &brd->pci_dev,
jsm_dbg(INIT, &brd->pci_dev,
jsm_dbg(INIT, &brd->pci_dev, "jsm_found_board - NEO adapter\n");
jsm_dbg(INTR, &brd->pci_dev, "%s:%d uart_poll: %x\n",
jsm_dbg(INTR, &brd->pci_dev,
jsm_dbg(INTR, &brd->pci_dev, "%s:%d port: %x type: %x\n",
jsm_dbg(PARAM, &ch->ch_bd->pci_dev, "Setting IXON FLOW\n");
jsm_dbg(INTR, &brd->pci_dev,
jsm_dbg(INTR, &brd->pci_dev,
jsm_dbg(INTR, &brd->pci_dev, "finish\n");
jsm_dbg(PARAM, &ch->ch_bd->pci_dev, "Setting IXOFF FLOW\n");
jsm_dbg(PARAM, &ch->ch_bd->pci_dev, "Unsetting Input FLOW\n");
jsm_dbg(PARAM, &ch->ch_bd->pci_dev, "Unsetting Output FLOW\n");
jsm_dbg(PARAM, &ch->ch_bd->pci_dev, "start\n");
jsm_dbg(PARAM, &ch->ch_bd->pci_dev, "Setting CTSFLOW\n");
jsm_dbg(READ, &ch->ch_bd->pci_dev,
jsm_dbg(READ, &ch->ch_bd->pci_dev, "DATA/LSR pair: %x %x\n",
jsm_dbg(WRITE, &ch->ch_bd->pci_dev, "Tx data: %x\n", c);
jsm_dbg(MSIGS, &ch->ch_bd->pci_dev,
jsm_dbg(MSIGS, &ch->ch_bd->pci_dev,
jsm_dbg(IOCTL, &ch->ch_bd->pci_dev,
jsm_dbg(IOCTL, &ch->ch_bd->pci_dev,
jsm_dbg(IOCTL, &ch->ch_bd->pci_dev,
jsm_dbg(PARAM, &ch->ch_bd->pci_dev, "Setting RTSFLOW\n");
jsm_dbg(INTR, &ch->ch_bd->pci_dev, "%s:%d isr: %x\n",
jsm_dbg(INTR, &ch->ch_bd->pci_dev,
jsm_dbg(INTR, &ch->ch_bd->pci_dev,
jsm_dbg(INTR, &ch->ch_bd->pci_dev,
jsm_dbg(INTR, &ch->ch_bd->pci_dev,
jsm_dbg(INTR, &ch->ch_bd->pci_dev,
jsm_dbg(INTR, &ch->ch_bd->pci_dev, "%s:%d port: %d linestatus: %x\n",
jsm_dbg(INTR, &ch->ch_bd->pci_dev,
jsm_dbg(INTR, &ch->ch_bd->pci_dev, "%s:%d Port: %d. PAR ERR!\n",
jsm_dbg(INTR, &ch->ch_bd->pci_dev, "%s:%d Port: %d. FRM ERR!\n",
jsm_dbg(INTR, &ch->ch_bd->pci_dev,
jsm_dbg(INTR, &ch->ch_bd->pci_dev,
jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n");
jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n");
jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n");
jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n");
jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n");
jsm_dbg(INIT, &channel->ch_bd->pci_dev,
jsm_dbg(INIT, &channel->ch_bd->pci_dev,
jsm_dbg(OPEN, &channel->ch_bd->pci_dev,
jsm_dbg(OPEN, &channel->ch_bd->pci_dev, "finish\n");
jsm_dbg(CLOSE, &channel->ch_bd->pci_dev, "start\n");
jsm_dbg(CLOSE, &channel->ch_bd->pci_dev,
jsm_dbg(CLOSE, &channel->ch_bd->pci_dev, "finish\n");
jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "start\n");
jsm_dbg(INIT, &brd->pci_dev, "start\n");
jsm_dbg(CORE, &brd->pci_dev,
jsm_dbg(INIT, &brd->pci_dev, "finish\n");
jsm_dbg(INIT, &brd->pci_dev, "start\n");
jsm_dbg(INIT, &brd->pci_dev, "finish\n");
jsm_dbg(INIT, &brd->pci_dev, "start\n");
jsm_dbg(INIT, &brd->pci_dev, "finish\n");
jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "finish\n");
jsm_dbg(READ, &ch->ch_bd->pci_dev, "start\n");
jsm_dbg(READ, &ch->ch_bd->pci_dev, "start\n");
jsm_dbg(READ, &ch->ch_bd->pci_dev,
jsm_dbg(READ, &ch->ch_bd->pci_dev,
jsm_dbg(READ, &ch->ch_bd->pci_dev, "start 2\n");
jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "finish\n");
jsm_dbg(CARR, &ch->ch_bd->pci_dev, "start\n");
jsm_dbg(CARR, &ch->ch_bd->pci_dev, "mistat: %x D_CD: %x\n",
jsm_dbg(CARR, &ch->ch_bd->pci_dev, "DCD: physical: %d virt: %d\n",
jsm_dbg(CARR, &ch->ch_bd->pci_dev, "carrier: virt DCD rose\n");
jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n");
jsm_dbg(CARR, &ch->ch_bd->pci_dev,
jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n");
jsm_dbg(READ, &ch->ch_bd->pci_dev,
jsm_dbg(READ, &ch->ch_bd->pci_dev,
jsm_dbg(READ, &ch->ch_bd->pci_dev,
jsm_dbg(READ, &ch->ch_bd->pci_dev,
jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n");