jh71x0_clk_reg_rmw
jh71x0_clk_reg_rmw(clk, JH71X0_CLK_DIV_MASK, div);
jh71x0_clk_reg_rmw(clk, JH71X0_CLK_DIV_MASK, value);
jh71x0_clk_reg_rmw(clk, JH71X0_CLK_MUX_MASK, value);
jh71x0_clk_reg_rmw(clk, JH71X0_CLK_INVERT, value);
jh71x0_clk_reg_rmw(clk, JH71X0_CLK_ENABLE, JH71X0_CLK_ENABLE);
jh71x0_clk_reg_rmw(clk, JH71X0_CLK_ENABLE, 0);