is_uv
static inline int is_uv2_hub(void) { return is_uv(UV2); }
static inline int is_uv3_hub(void) { return is_uv(UV3); }
static inline int is_uv4a_hub(void) { return is_uv(UV4A); }
static inline int is_uv4_hub(void) { return is_uv(UV4); }
static inline int is_uv5_hub(void) { return is_uv(UV5); }
static inline int is_uvx_hub(void) { return is_uv(UVX); }
static inline int is_uvy_hub(void) { return is_uv(UVY); }
static inline int is_uv_hub(void) { return is_uv(UV_ANY); }
is_uv(UV2) ? UV2_LOCAL_MMR_BASE : \
is_uv(UV3) ? UV3_LOCAL_MMR_BASE : \
is_uv(UV4) ? UV4_LOCAL_MMR_BASE : \
is_uv(UV5) ? UV5_LOCAL_MMR_BASE : \
is_uv(UV2) ? UV2_GLOBAL_MMR32_BASE : \
is_uv(UV3) ? UV3_GLOBAL_MMR32_BASE : \
is_uv(UV4) ? UV4_GLOBAL_MMR32_BASE : \
is_uv(UV5) ? UV5_GLOBAL_MMR32_BASE : \
is_uv(UV2) ? UV2_LOCAL_MMR_SIZE : \
is_uv(UV3) ? UV3_LOCAL_MMR_SIZE : \
is_uv(UV4) ? UV4_LOCAL_MMR_SIZE : \
is_uv(UV5) ? UV5_LOCAL_MMR_SIZE : \
is_uv(UV2) ? UV2_GLOBAL_MMR32_SIZE : \
is_uv(UV3) ? UV3_GLOBAL_MMR32_SIZE : \
is_uv(UV4) ? UV4_GLOBAL_MMR32_SIZE : \
is_uv(UV5) ? UV5_GLOBAL_MMR32_SIZE : \
is_uv(UV5) ? 0x0000000000000002UL : \
is_uv(UV5) ? 1 : \
is_uv(UV5) ? 0x0000000000000008UL : \
is_uv(UV4) ? 0x0000000000080000UL : \
is_uv(UV3) ? 0x0000000000000002UL : \
is_uv(UV2) ? 0x0000000000000002UL : \
is_uv(UV5) ? 3 : \
is_uv(UV4) ? 19 : \
is_uv(UV3) ? 1 : \
is_uv(UV2) ? 1 : \
is_uv(UV5) ? 0x600028UL : \
is_uv(UV4) ? 0x600028UL : \
is_uv(UV3) ? 0xc00028UL : \
is_uv(UV2) ? 0xc00028UL : \
is_uv(UV4) ? 0x61b00UL : \
is_uv(UV3) ? 0x61b00UL : \
is_uv(UV2) ? 0x61b00UL : \
is_uv(UV4) ? 0x61b40UL : \
is_uv(UV3) ? 0x61b40UL : \
is_uv(UV2) ? 0x61b40UL : \
is_uv(UV4) ? 0x62100UL : \
is_uv(UV3) ? 0x61f00UL : \
is_uv(UV2) ? 0x61f00UL : \
is_uv(UV4) ? 0x62140UL : \
is_uv(UV3) ? 0x61f40UL : \
is_uv(UV2) ? 0x61f40UL : \
is_uv(UV5) ? 0x1400UL : \
is_uv(UV5) ? 0x1408UL : \
is_uv(UV4) ? 0x1400UL : \
is_uv(UV3) ? 0x1400UL : \
is_uv(UV2) ? 0x1400UL : \
is_uv(UV4) ? 4 : \
is_uv(UV3) ? 16 : \
is_uv(UV2) ? 16 : \
is_uv(UV5) ? 0x470000UL : \
is_uv(UV5) ? 0x4700b0UL : \
is_uv(UV5) ? 0x000ffffffe000000UL : \
is_uv(UV5) ? 25 : \
is_uv(UV5) ? 0x473000UL : \
is_uv(UV5) ? 0x000ffffffc000000UL : \
is_uv(UV5) ? 26 : \
is_uv(UV5) ? 0x474000UL : \
is_uv(UV5) ? 0x000ffffffc000000UL : \
is_uv(UV5) ? 26 : \
is_uv(UV5) ? 0x473800UL : \
is_uv(UV5) ? 128 : \
is_uv(UV5) ? 0x474800UL : \
is_uv(UV5) ? 128 : \
is_uv(UV5) ? 0x470090UL : \
is_uv(UV5) ? 0x000ffffffe000000UL : \
is_uv(UV5) ? 25 : \
is_uv(UV4) ? 0x480000UL : \
is_uv(UV3) ? 0x1600000UL : \
is_uv(UV2) ? 0x1600000UL : \
is_uv(UV4) ? 0x4800c8UL : \
is_uv(UV3) ? 0x16000c8UL : \
is_uv(UV2) ? 0x16000c8UL : \
is_uv(UV4) ? 0x4800d0UL : \
is_uv(UV3) ? 0x16000d0UL : \
is_uv(UV2) ? 0x16000d0UL : \
is_uv(UV4) ? 0x4800d8UL : \
is_uv(UV3) ? 0x16000d8UL : \
is_uv(UV2) ? 0x16000d8UL : \
is_uv(UV4) ? 0x4800e0UL : \
is_uv(UV3) ? 0x16000e0UL : \
is_uv(UV2) ? 0x16000e0UL : \
is_uv(UV4) ? 0x4800e8UL : \
is_uv(UV3) ? 0x16000e8UL : \
is_uv(UV2) ? 0x16000e8UL : \
is_uv(UV4) ? 0x4800f0UL : \
is_uv(UV3) ? 0x16000f0UL : \
is_uv(UV2) ? 0x16000f0UL : \
is_uv(UV4) ? 0x480010UL : \
is_uv(UV3) ? 0x1600010UL : \
is_uv(UV2) ? 0x1600010UL : \
is_uv(UV4A) ? 0x000ffffffc000000UL : \
is_uv(UV4) ? 0x00003ffffc000000UL : \
is_uv(UV3) ? 0x00003ffff0000000UL : \
is_uv(UV2) ? 0x00003ffff0000000UL : \
is_uv(UV4) ? 26 : \
is_uv(UV3) ? 28 : \
is_uv(UV2) ? 28 : \
is_uv(UV2) ? 0x1600030UL : \
is_uv(UV2) ? 27 : \
is_uv(UV4) ? 0x483000UL : \
is_uv(UV3) ? 0x1603000UL : \
is_uv(UV4A) ? 0x000ffffffc000000UL : \
is_uv(UV4) ? 0x00003ffffc000000UL : \
is_uv(UV3) ? 0x00003ffffc000000UL : \
is_uv(UV4) ? 26 : \
is_uv(UV3) ? 26 : \
is_uv(UV4) ? 0x484000UL : \
is_uv(UV3) ? 0x1604000UL : \
is_uv(UV4A) ? 0x000ffffffc000000UL : \
is_uv(UV4) ? 0x00003ffffc000000UL : \
is_uv(UV3) ? 0x00003ffffc000000UL : \
is_uv(UV4) ? 26 : \
is_uv(UV3) ? 26 : \
is_uv(UV4) ? 0x483800UL : \
is_uv(UV3) ? 0x1603800UL : \
is_uv(UV4) ? 128 : \
is_uv(UV3) ? 128 : \
is_uv(UV4A) ? UV4AH_RH_GAM_MMIOH_REDIRECT_CONFIG0_NASID_MASK : \
is_uv(UV4) ? UV4H_RH_GAM_MMIOH_REDIRECT_CONFIG0_NASID_MASK : \
is_uv(UV3) ? UV3H_RH_GAM_MMIOH_REDIRECT_CONFIG0_NASID_MASK : \
is_uv(UV4) ? 0x484800UL : \
is_uv(UV3) ? 0x1604800UL : \
is_uv(UV4) ? 128 : \
is_uv(UV3) ? 128 : \
is_uv(UV4A) ? UV4AH_RH_GAM_MMIOH_REDIRECT_CONFIG1_NASID_MASK : \
is_uv(UV4) ? UV4H_RH_GAM_MMIOH_REDIRECT_CONFIG1_NASID_MASK : \
is_uv(UV3) ? UV3H_RH_GAM_MMIOH_REDIRECT_CONFIG1_NASID_MASK : \
is_uv(UV4) ? 0x480028UL : \
is_uv(UV3) ? 0x1600028UL : \
is_uv(UV2) ? 0x1600028UL : \
is_uv(UV4A) ? 0x000ffffffc000000UL : \
is_uv(UV4) ? 0x00003ffffc000000UL : \
is_uv(UV3) ? 0x00003ffffc000000UL : \
is_uv(UV2) ? 0x00003ffffc000000UL : \
is_uv(UV4A) ? 0x000ffffffc000000UL : \
is_uv(UV4) ? 0x00003ffffc000000UL : \
is_uv(UV3) ? 0x00003ffffc000000UL : \
is_uv(UV2) ? 0x00003ffffc000000UL : \
is_uv(UV4) ? 26 : \
is_uv(UV3) ? 26 : \
is_uv(UV2) ? 26 : \
is_uv(UV5) ? 0xe0000UL : \
is_uv(UV4) ? 0xe0000UL : \
is_uv(UV3) ? 0x340000UL : \
is_uv(UV2) ? 0x340000UL : \
is_uv(UV5) ? 0xb0200UL : \
is_uv(UV4) ? 0xb0200UL : \
is_uv(UV3) ? 0x2d0200UL : \
is_uv(UV2) ? 0x2d0200UL : \
is_uv(UV5) ? 0xb0208UL : \
is_uv(UV4) ? 0xb0208UL : \
is_uv(UV3) ? 0x2d0208UL : \
is_uv(UV2) ? 0x2d0208UL : \
is_uv(UV5) ? 0xb0210UL : \
is_uv(UV4) ? 0xb0210UL : \
is_uv(UV3) ? 0x2d0210UL : \
is_uv(UV2) ? 0x2d0210UL : \
is_uv(UV4) ? 0x1000000000000000UL : \
is_uv(UV3) ? 0x0040000000000000UL : \
is_uv(UV2) ? 0x0040000000000000UL : \
is_uv(UV4) ? 60 : \
is_uv(UV3) ? 54 : \
is_uv(UV2) ? 54 : \
if (is_uv(UV3))
if (is_uv(UV2))
if (is_uv(UV4|UVY)) {
if (is_uv(UV4|UVY))
if (is_uv(UV2|UV3) && !uv_gre_table)
uv_min_hub_revision_id, is_uv(~0));
if (!is_uv(UV2|UV3|UV4)) {
is_uv(UV4A) ? sname.s4a.field : \
is_uv(UV4) ? sname.s4.field : \
is_uv(UV3) ? sname.s3.field : \
oem_id, oem_table_id, uv_system_type, is_uv(UV_ANY),