CLK_GOUT_FSYS0_XIU_P_FSYS0_ACLK
GATE(CLK_GOUT_FSYS0_XIU_P_FSYS0_ACLK,
#define CLKS_NR_FSYS0 (CLK_GOUT_FSYS0_XIU_P_FSYS0_ACLK + 1)