iommu_feature_enable
void iommu_feature_enable(struct amd_iommu *iommu, u8 bit);
iommu_feature_enable(iommu, CONTROL_XT_EN);
iommu_feature_enable(iommu, CONTROL_GT_EN);
iommu_feature_enable(iommu, CONTROL_GCR3TRPMODE);
iommu_feature_enable(iommu, CONTROL_INTCAPXT_EN);
iommu_feature_enable(iommu, CONTROL_EVT_INT_EN);
iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) :
iommu_feature_enable(iommu, CONTROL_PASSPW_EN) :
iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) :
iommu_feature_enable(iommu, CONTROL_ISOC_EN) :
iommu_feature_enable(iommu, CONTROL_COHERENT_EN);
iommu_feature_enable(iommu, CONTROL_EPH_EN);
iommu_feature_enable(iommu, CONTROL_GA_EN);
iommu_feature_enable(iommu, CONTROL_IRTCACHEDIS);
iommu_feature_enable(iommu, CONTROL_GAM_EN);
iommu_feature_enable(iommu, CONTROL_SNPAVIC_EN);
iommu_feature_enable(iommu, CONTROL_IOMMU_EN);
iommu_feature_enable(iommu, cntrl_intr);
iommu_feature_enable(iommu, cntrl_log);
iommu_feature_enable(iommu, CONTROL_CMDBUF_EN);
iommu_feature_enable(iommu, CONTROL_EVT_LOG_EN);
iommu_feature_enable(iommu, CONTROL_GAINT_EN);
iommu_feature_enable(iommu, CONTROL_GALOG_EN);
iommu_feature_enable(iommu, CONTROL_PPR_EN);
iommu_feature_enable(iommu, CONTROL_PPRINT_EN);
iommu_feature_enable(iommu, CONTROL_PPRLOG_EN);