irq_source
struct irq_source *src;
struct irq_source *src;
struct irq_source src[MAX_IRQ];
struct irq_source *src;
struct irq_source *src;
struct irq_source *src;
struct irq_source *src = &opp->src[n_IRQ];
struct irq_source *src = &opp->src[n_IRQ];
enum dc_irq_source irq_source;
irq_source = IRQ_TYPE_PFLIP + acrtc->otg_inst;
rc = dc_interrupt_set(adev->dm.dc, irq_source, enable) ? 0 : -EBUSY;
irq_source = IRQ_TYPE_VBLANK + acrtc->otg_inst;
if (!dc_interrupt_set(adev->dm.dc, irq_source, enable))
int_params.irq_source = dc_link->irq_source_hpd;
if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||
int_params.irq_source < DC_IRQ_SOURCE_HPD1 ||
int_params.irq_source > DC_IRQ_SOURCE_HPD6) {
int_params.irq_source = dc_link->irq_source_hpd_rx;
if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||
int_params.irq_source < DC_IRQ_SOURCE_HPD1RX ||
int_params.irq_source > DC_IRQ_SOURCE_HPD6RX) {
int_params.irq_source =
if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||
int_params.irq_source < DC_IRQ_SOURCE_VBLANK1 ||
int_params.irq_source > DC_IRQ_SOURCE_VBLANK6) {
c_irq_params = &adev->dm.vblank_params[int_params.irq_source - DC_IRQ_SOURCE_VBLANK1];
c_irq_params->irq_src = int_params.irq_source;
int_params.irq_source =
if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||
int_params.irq_source < DC_IRQ_SOURCE_PFLIP_FIRST ||
int_params.irq_source > DC_IRQ_SOURCE_PFLIP_LAST) {
c_irq_params = &adev->dm.pflip_params[int_params.irq_source - DC_IRQ_SOURCE_PFLIP_FIRST];
c_irq_params->irq_src = int_params.irq_source;
int_params.irq_source =
if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||
int_params.irq_source < DC_IRQ_SOURCE_VBLANK1 ||
int_params.irq_source > DC_IRQ_SOURCE_VBLANK6) {
c_irq_params = &adev->dm.vblank_params[int_params.irq_source - DC_IRQ_SOURCE_VBLANK1];
c_irq_params->irq_src = int_params.irq_source;
int_params.irq_source =
if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||
int_params.irq_source < DC_IRQ_SOURCE_VUPDATE1 ||
int_params.irq_source > DC_IRQ_SOURCE_VUPDATE6) {
c_irq_params = &adev->dm.vupdate_params[int_params.irq_source - DC_IRQ_SOURCE_VUPDATE1];
c_irq_params->irq_src = int_params.irq_source;
int_params.irq_source =
if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||
int_params.irq_source < DC_IRQ_SOURCE_PFLIP_FIRST ||
int_params.irq_source > DC_IRQ_SOURCE_PFLIP_LAST) {
c_irq_params = &adev->dm.pflip_params[int_params.irq_source - DC_IRQ_SOURCE_PFLIP_FIRST];
c_irq_params->irq_src = int_params.irq_source;
int_params.irq_source =
if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||
int_params.irq_source < DC_IRQ_SOURCE_VBLANK1 ||
int_params.irq_source > DC_IRQ_SOURCE_VBLANK6) {
c_irq_params = &adev->dm.vblank_params[int_params.irq_source - DC_IRQ_SOURCE_VBLANK1];
c_irq_params->irq_src = int_params.irq_source;
int_params.irq_source =
if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||
int_params.irq_source < DC_IRQ_SOURCE_DC1_VLINE0 ||
int_params.irq_source > DC_IRQ_SOURCE_DC6_VLINE0) {
c_irq_params = &adev->dm.vline0_params[int_params.irq_source
c_irq_params->irq_src = int_params.irq_source;
int_params.irq_source =
if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||
int_params.irq_source < DC_IRQ_SOURCE_VUPDATE1 ||
int_params.irq_source > DC_IRQ_SOURCE_VUPDATE6) {
c_irq_params = &adev->dm.vupdate_params[int_params.irq_source - DC_IRQ_SOURCE_VUPDATE1];
c_irq_params->irq_src = int_params.irq_source;
int_params.irq_source =
if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||
int_params.irq_source < DC_IRQ_SOURCE_PFLIP_FIRST ||
int_params.irq_source > DC_IRQ_SOURCE_PFLIP_LAST) {
c_irq_params = &adev->dm.pflip_params[int_params.irq_source - DC_IRQ_SOURCE_PFLIP_FIRST];
c_irq_params->irq_src = int_params.irq_source;
int_params.irq_source =
c_irq_params->irq_src = int_params.irq_source;
enum dc_irq_source irq_source;
irq_source = IRQ_TYPE_VUPDATE + acrtc->otg_inst;
rc = dc_interrupt_set(adev->dm.dc, irq_source, enable) ? 0 : -EBUSY;
enum dc_irq_source irq_source;
irq_source = DC_IRQ_SOURCE_DMCUB_OUTBOX;
ret = dc_interrupt_set(ctx->dc, irq_source, enable);
enum dc_irq_source irq_source;
irq_source = int_params->irq_source;
hnd_list = &adev->dm.irq_handler_list_high_tab[irq_source];
hnd_list = &adev->dm.irq_handler_list_low_tab[irq_source];
ih, int_params->irq_source, int_params->int_context);
if (!DAL_VALID_IRQ_SRC_NUM(int_params->irq_source)) {
int_params->irq_source);
static bool validate_irq_unregistration_params(enum dc_irq_source irq_source,
if (!DAL_VALID_IRQ_SRC_NUM(irq_source)) {
DRM_ERROR("DM_IRQ: invalid irq_source:%d!\n", irq_source);
enum dc_irq_source irq_source;
irq_source = int_params->irq_source;
handler_data->irq_source = irq_source;
hnd_list = &adev->dm.irq_handler_list_high_tab[irq_source];
hnd_list = &adev->dm.irq_handler_list_low_tab[irq_source];
irq_source,
enum dc_irq_source irq_source,
if (false == validate_irq_unregistration_params(irq_source, ih))
int_params.irq_source = irq_source;
ih, irq_source);
enum dc_irq_source irq_source)
struct list_head *handler_list = &adev->dm.irq_handler_list_low_tab[irq_source];
handler_data_add->irq_source = irq_source;
irq_source);
irq_source);
enum dc_irq_source irq_source)
&adev->dm.irq_handler_list_high_tab[irq_source],
enum dc_irq_source irq_source;
irq_source = dal_irq_type + acrtc->otg_inst;
dc_interrupt_set(adev->dm.dc, irq_source, st);
enum dc_irq_source irq_source = DC_IRQ_SOURCE_DMCUB_OUTBOX;
dc_interrupt_set(adev->dm.dc, irq_source, st);
enum dc_irq_source irq_source = DC_IRQ_SOURCE_DMCUB_OUTBOX0;
dc_interrupt_set(adev->dm.dc, irq_source, st);
enum dc_irq_source irq_source;
enum dc_irq_source irq_source,
enum dc_irq_source irq_source;
enum dc_irq_source irq_source;
struct amdgpu_irq_src irq_source;
ret = amdgpu_irq_get(smu->adev, &smu->irq_source, 0);
ret = amdgpu_irq_put(smu->adev, &smu->irq_source, 0);
struct amdgpu_irq_src *irq_src = &smu->irq_source;
if (!smu->irq_source.num_types)
ret = amdgpu_irq_get(smu->adev, &smu->irq_source, 0);
if (!smu->irq_source.num_types)
return amdgpu_irq_put(smu->adev, &smu->irq_source, 0);
struct amdgpu_irq_src *irq_src = &smu->irq_source;
struct amdgpu_irq_src *irq_src = &smu->irq_source;
struct amdgpu_irq_src *irq_src = &smu->irq_source;
if (!smu->irq_source.num_types)
ret = amdgpu_irq_get(smu->adev, &smu->irq_source, 0);
if (!smu->irq_source.num_types)
return amdgpu_irq_put(smu->adev, &smu->irq_source, 0);
if (!smu->irq_source.num_types)
ret = amdgpu_irq_get(smu->adev, &smu->irq_source, 0);
if (!smu->irq_source.num_types)
return amdgpu_irq_put(smu->adev, &smu->irq_source, 0);
struct amdgpu_irq_src *irq_src = &smu->irq_source;
.irq_source = MUXED_L1,
if (qspi_irq_tab[val].irq_source == SINGLE_L2) {
int irq_source;