drivers/gpu/drm/i915/display/intel_de.h

59

intel_reg_t upper_reg = _MMIO(intel_reg_offset(reg) + 4);

drivers/gpu/drm/i915/display/intel_display_device.c

1528

addr = pci_iomap_range(pdev, 0, intel_reg_offset(GMD_ID_DISPLAY), sizeof(u32));

drivers/gpu/drm/i915/display/intel_display_irq.c

60

intel_reg_offset(reg), val);

drivers/gpu/drm/i915/display/intel_display_reg_defs.h

20

return intel_reg_offset(a) == intel_reg_offset(b);

drivers/gpu/drm/i915/display/intel_dmc.c

1149

i, intel_reg_offset(dmc_info->mmioaddr[i]),

drivers/gpu/drm/i915/display/intel_dmc.c

1153

i+1, intel_reg_offset(dmc_info->mmioaddr[i+1]),

drivers/gpu/drm/i915/display/intel_dmc.c

1159

i, intel_reg_offset(dmc_info->mmioaddr[i]), dmc_info->mmiodata[i],

drivers/gpu/drm/i915/display/intel_dmc.c

543

u32 offset = intel_reg_offset(reg);

drivers/gpu/drm/i915/display/intel_dmc.c

544

u32 start = intel_reg_offset(DMC_EVT_CTL(display, dmc_id, 0));

drivers/gpu/drm/i915/display/intel_dmc.c

545

u32 end = intel_reg_offset(DMC_EVT_CTL(display, dmc_id, DMC_EVENT_HANDLER_COUNT_GEN12));

drivers/gpu/drm/i915/display/intel_dmc.c

553

u32 offset = intel_reg_offset(reg);

drivers/gpu/drm/i915/display/intel_dmc.c

554

u32 start = intel_reg_offset(DMC_EVT_HTP(display, dmc_id, 0));

drivers/gpu/drm/i915/display/intel_dmc.c

555

u32 end = intel_reg_offset(DMC_EVT_HTP(display, dmc_id, DMC_EVENT_HANDLER_COUNT_GEN12));

drivers/gpu/drm/i915/display/intel_dmc.c

581

if (intel_reg_offset(reg_ctl) - intel_reg_offset(DMC_EVT_CTL(display, dmc_id, 0)) !=

drivers/gpu/drm/i915/display/intel_dmc.c

582

intel_reg_offset(reg_htp) - intel_reg_offset(DMC_EVT_HTP(display, dmc_id, 0)))

drivers/gpu/drm/i915/display/intel_dmc.c

706

dmc_id, i, intel_reg_offset(reg), expected, found);

drivers/gpu/drm/i915/display/intel_dmc_wl.c

237

u32 offset = intel_reg_offset(reg);

drivers/gpu/drm/i915/display/intel_dsb.c

344

return prev_opcode == opcode && prev_reg == intel_reg_offset(reg);

drivers/gpu/drm/i915/display/intel_dsb.c

389

intel_reg_offset(reg));

drivers/gpu/drm/i915/display/intel_dsb.c

410

intel_reg_offset(reg));

drivers/gpu/drm/i915/display/intel_dsb.c

428

intel_reg_offset(reg));

drivers/gpu/drm/i915/display/intel_dsb.c

568

intel_reg_offset(reg));

drivers/gpu/drm/i915/display/intel_mchbar.c

47

in_range32(intel_reg_offset(reg),

drivers/gpu/drm/i915/display/intel_mchbar.c

56

intel_reg_offset(reg));