iproc_i2c_rd_reg
tmp = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);
tmp = iproc_i2c_rd_reg(iproc_i2c, S_CFG_SMBUS_ADDR_OFFSET);
val = iproc_i2c_rd_reg(iproc_i2c, TIM_CFG_OFFSET);
iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);
iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);
val = iproc_i2c_rd_reg(iproc_i2c, TIM_CFG_OFFSET);
val = iproc_i2c_rd_reg(iproc_i2c, CFG_OFFSET);
val = iproc_i2c_rd_reg(iproc_i2c, TIM_CFG_OFFSET);
val = iproc_i2c_rd_reg(iproc_i2c, S_CFG_SMBUS_ADDR_OFFSET);
val = iproc_i2c_rd_reg(iproc_i2c, CFG_OFFSET);
val = iproc_i2c_rd_reg(iproc_i2c, S_CMD_OFFSET);
val = iproc_i2c_rd_reg(iproc_i2c, S_RX_OFFSET);
val = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);
val = iproc_i2c_rd_reg(iproc_i2c, S_FIFO_CTRL_OFFSET);
val = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);
val = iproc_i2c_rd_reg(iproc_i2c, M_RX_OFFSET);
tmp = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);
val = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);
val = iproc_i2c_rd_reg(iproc_i2c, M_FIFO_CTRL_OFFSET);
status = iproc_i2c_rd_reg(iproc_i2c, IS_OFFSET);
slave_status = status & iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET) &
val = iproc_i2c_rd_reg(iproc_i2c, CFG_OFFSET);
val = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);
val = iproc_i2c_rd_reg(iproc_i2c, M_CMD_OFFSET);
iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);
status = iproc_i2c_rd_reg(iproc_i2c,
if (iproc_i2c_rd_reg(iproc_i2c,
tmp = iproc_i2c_rd_reg(iproc_i2c, M_FIFO_CTRL_OFFSET);