drivers/gpu/drm/i915/gt/uc/intel_guc.c

270

offset = intel_guc_ggtt_offset(guc, log->vma) >> PAGE_SHIFT;

drivers/gpu/drm/i915/gt/uc/intel_guc.c

286

u32 ads = intel_guc_ggtt_offset(guc, guc->ads_vma) >> PAGE_SHIFT;

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

1053

return intel_guc_ggtt_offset(guc, guc->ads_vma) +

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

473

addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

552

addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

636

addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

718

ads_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma);

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

872

addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

918

base = intel_guc_ggtt_offset(guc, guc->ads_vma);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

279

CT_DEBUG(ct, "base=%#x size=%u\n", intel_guc_ggtt_offset(guc, ct->vma), blob_size);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

340

base = intel_guc_ggtt_offset(guc, ct->vma);

drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c

84

intel_guc_ggtt_offset(guc, guc_fw->rsa_data));

drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c

87

ggtt_offset = intel_guc_ggtt_offset(guc, vma);

drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c

194

u32 offset = intel_guc_ggtt_offset(guc, slpc->vma);

drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c

349

u32 offset = intel_guc_ggtt_offset(guc, slpc->vma);

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

2569

u32 offset = intel_guc_ggtt_offset(guc, guc->lrc_desc_pool_v69) +

drivers/gpu/drm/i915/gt/uc/intel_huc.c

546

ret = intel_guc_auth_huc(guc, intel_guc_ggtt_offset(guc, huc->fw.rsa_data));