Symbol: intel_engine_mask_t
drivers/gpu/drm/i915/gem/i915_gem_context.c
592
intel_engine_mask_t prev_mask;
drivers/gpu/drm/i915/gem/i915_gem_context.c
654
intel_engine_mask_t current_mask = 0;
drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h
50
intel_engine_mask_t engine_mask;
drivers/gpu/drm/i915/gt/intel_engine_cs.c
852
static intel_engine_mask_t init_engine_mask(struct intel_gt *gt)
drivers/gpu/drm/i915/gt/intel_engine_pm.h
44
intel_engine_mask_t tmp, mask = engine->mask;
drivers/gpu/drm/i915/gt/intel_engine_pm.h
80
intel_engine_mask_t tmp, mask = engine->mask;
drivers/gpu/drm/i915/gt/intel_engine_types.h
376
intel_engine_mask_t mask;
drivers/gpu/drm/i915/gt/intel_engine_types.h
384
intel_engine_mask_t logical_mask;
drivers/gpu/drm/i915/gt/intel_engine_types.h
443
intel_engine_mask_t saturated; /* submitting semaphores too late? */
drivers/gpu/drm/i915/gt/intel_engine_types.h
60
#define ALL_ENGINES ((intel_engine_mask_t)~0ul)
drivers/gpu/drm/i915/gt/intel_engine_types.h
61
#define VIRTUAL_ENGINES BIT(BITS_PER_TYPE(intel_engine_mask_t) - 1)
drivers/gpu/drm/i915/gt/intel_execlists_submission.c
3782
static intel_engine_mask_t virtual_submission_mask(struct virtual_engine *ve)
drivers/gpu/drm/i915/gt/intel_execlists_submission.c
3785
intel_engine_mask_t mask;
drivers/gpu/drm/i915/gt/intel_execlists_submission.c
3813
intel_engine_mask_t mask;
drivers/gpu/drm/i915/gt/intel_gt.c
245
intel_engine_mask_t engine_mask)
drivers/gpu/drm/i915/gt/intel_gt.h
150
intel_engine_mask_t engine_mask);
drivers/gpu/drm/i915/gt/intel_gt_types.h
215
intel_engine_mask_t cslices;
drivers/gpu/drm/i915/gt/intel_gt_types.h
262
intel_engine_mask_t engine_mask;
drivers/gpu/drm/i915/gt/intel_gt_types.h
308
intel_engine_mask_t engine_mask;
drivers/gpu/drm/i915/gt/intel_reset.c
1151
static int do_reset(struct intel_gt *gt, intel_engine_mask_t stalled_mask)
drivers/gpu/drm/i915/gt/intel_reset.c
1206
intel_engine_mask_t stalled_mask,
drivers/gpu/drm/i915/gt/intel_reset.c
1210
intel_engine_mask_t awake;
drivers/gpu/drm/i915/gt/intel_reset.c
1474
intel_engine_mask_t engine_mask,
drivers/gpu/drm/i915/gt/intel_reset.c
1480
intel_engine_mask_t tmp;
drivers/gpu/drm/i915/gt/intel_reset.c
158
intel_engine_mask_t engine_mask,
drivers/gpu/drm/i915/gt/intel_reset.c
187
intel_engine_mask_t engine_mask,
drivers/gpu/drm/i915/gt/intel_reset.c
197
intel_engine_mask_t engine_mask,
drivers/gpu/drm/i915/gt/intel_reset.c
233
static int ilk_do_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask,
drivers/gpu/drm/i915/gt/intel_reset.c
321
intel_engine_mask_t engine_mask,
drivers/gpu/drm/i915/gt/intel_reset.c
330
intel_engine_mask_t tmp;
drivers/gpu/drm/i915/gt/intel_reset.c
342
intel_engine_mask_t engine_mask,
drivers/gpu/drm/i915/gt/intel_reset.c
522
intel_engine_mask_t engine_mask,
drivers/gpu/drm/i915/gt/intel_reset.c
526
intel_engine_mask_t tmp;
drivers/gpu/drm/i915/gt/intel_reset.c
611
intel_engine_mask_t engine_mask,
drivers/gpu/drm/i915/gt/intel_reset.c
616
intel_engine_mask_t tmp;
drivers/gpu/drm/i915/gt/intel_reset.c
666
intel_engine_mask_t mask,
drivers/gpu/drm/i915/gt/intel_reset.c
673
intel_engine_mask_t engine_mask,
drivers/gpu/drm/i915/gt/intel_reset.c
706
static bool needs_wa_14015076503(struct intel_gt *gt, intel_engine_mask_t engine_mask)
drivers/gpu/drm/i915/gt/intel_reset.c
717
static intel_engine_mask_t
drivers/gpu/drm/i915/gt/intel_reset.c
718
wa_14015076503_start(struct intel_gt *gt, intel_engine_mask_t engine_mask, bool first)
drivers/gpu/drm/i915/gt/intel_reset.c
756
wa_14015076503_end(struct intel_gt *gt, intel_engine_mask_t engine_mask)
drivers/gpu/drm/i915/gt/intel_reset.c
766
static int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask)
drivers/gpu/drm/i915/gt/intel_reset.c
783
intel_engine_mask_t reset_mask;
drivers/gpu/drm/i915/gt/intel_reset.c
875
static intel_engine_mask_t reset_prepare(struct intel_gt *gt)
drivers/gpu/drm/i915/gt/intel_reset.c
878
intel_engine_mask_t awake = 0;
drivers/gpu/drm/i915/gt/intel_reset.c
907
static int gt_reset(struct intel_gt *gt, intel_engine_mask_t stalled_mask)
drivers/gpu/drm/i915/gt/intel_reset.c
942
static void reset_finish(struct intel_gt *gt, intel_engine_mask_t awake)
drivers/gpu/drm/i915/gt/intel_reset.c
973
intel_engine_mask_t awake;
drivers/gpu/drm/i915/gt/intel_reset.h
26
intel_engine_mask_t engine_mask,
drivers/gpu/drm/i915/gt/intel_reset.h
34
intel_engine_mask_t stalled_mask,
drivers/gpu/drm/i915/gt/intel_tlb.c
54
intel_engine_mask_t awake, tmp;
drivers/gpu/drm/i915/gt/selftest_hangcheck.c
1286
static u32 fake_hangcheck(struct intel_gt *gt, intel_engine_mask_t mask)
drivers/gpu/drm/i915/gt/selftest_reset.c
19
intel_engine_mask_t mask,
drivers/gpu/drm/i915/gt/selftest_reset.c
277
intel_engine_mask_t awake;
drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.c
100
intel_engine_mask_t mask;
drivers/gpu/drm/i915/gt/uc/intel_guc.h
159
intel_engine_mask_t reset_fail_mask;
drivers/gpu/drm/i915/gt/uc/intel_guc.h
536
void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t stalled);
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
1397
intel_klog_error_capture(guc_to_gt(guc), (intel_engine_mask_t)~0U);
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
1756
intel_engine_mask_t tmp, mask = ve->mask;
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
1857
static void __guc_reset_context(struct intel_context *ce, intel_engine_mask_t stalled)
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
1927
void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t stalled)
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
4002
intel_engine_mask_t tmp, mask = ce->engine->mask;
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
4013
intel_engine_mask_t tmp, mask = ce->engine->mask;
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
4029
intel_engine_mask_t tmp, mask = ce->engine->mask;
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
4040
intel_engine_mask_t tmp, mask = ce->engine->mask;
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
4279
intel_engine_mask_t tmp, mask = b->engine_mask;
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
4292
intel_engine_mask_t tmp, mask = b->engine_mask;
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
4530
intel_engine_mask_t tmp, mask = engine->mask;
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
5186
intel_engine_mask_t engine_mask;
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
5190
intel_engine_mask_t tmp, virtual_mask = ce->engine->mask;
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
5317
intel_engine_mask_t reset_fail_mask;
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
6001
intel_engine_mask_t tmp, mask = ve->mask;
drivers/gpu/drm/i915/gt/uc/intel_huc.c
257
intel_engine_mask_t mask = gt->info.engine_mask;
drivers/gpu/drm/i915/gt/uc/intel_uc.c
609
void intel_uc_reset(struct intel_uc *uc, intel_engine_mask_t stalled)
drivers/gpu/drm/i915/gt/uc/intel_uc.h
49
void intel_uc_reset(struct intel_uc *uc, intel_engine_mask_t stalled);
drivers/gpu/drm/i915/gvt/cmd_parser.c
441
intel_engine_mask_t rings;
drivers/gpu/drm/i915/gvt/execlist.c
523
intel_engine_mask_t engine_mask)
drivers/gpu/drm/i915/gvt/execlist.c
527
intel_engine_mask_t tmp;
drivers/gpu/drm/i915/gvt/execlist.c
537
intel_engine_mask_t engine_mask)
drivers/gpu/drm/i915/gvt/execlist.c
540
intel_engine_mask_t tmp;
drivers/gpu/drm/i915/gvt/execlist.c
547
intel_engine_mask_t engine_mask)
drivers/gpu/drm/i915/gvt/gvt.h
145
int (*init)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
drivers/gpu/drm/i915/gvt/gvt.h
146
void (*clean)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
drivers/gpu/drm/i915/gvt/gvt.h
147
void (*reset)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
drivers/gpu/drm/i915/gvt/gvt.h
502
intel_engine_mask_t engine_mask);
drivers/gpu/drm/i915/gvt/handlers.c
338
intel_engine_mask_t engine_mask = 0;
drivers/gpu/drm/i915/gvt/scheduler.c
1057
intel_engine_mask_t engine_mask)
drivers/gpu/drm/i915/gvt/scheduler.c
1062
intel_engine_mask_t tmp;
drivers/gpu/drm/i915/gvt/scheduler.c
1352
intel_engine_mask_t engine_mask)
drivers/gpu/drm/i915/gvt/scheduler.c
1476
intel_engine_mask_t engine_mask,
drivers/gpu/drm/i915/gvt/scheduler.h
148
intel_engine_mask_t engine_mask);
drivers/gpu/drm/i915/gvt/scheduler.h
153
intel_engine_mask_t engine_mask,
drivers/gpu/drm/i915/gvt/scheduler.h
167
intel_engine_mask_t engine_mask);
drivers/gpu/drm/i915/gvt/vgpu.c
438
intel_engine_mask_t engine_mask)
drivers/gpu/drm/i915/gvt/vgpu.c
442
intel_engine_mask_t resetting_eng = dmlr ? ALL_ENGINES : engine_mask;
drivers/gpu/drm/i915/i915_active.c
846
intel_engine_mask_t tmp, mask = engine->mask;
drivers/gpu/drm/i915/i915_gpu_error.c
1742
intel_engine_mask_t engine_mask,
drivers/gpu/drm/i915/i915_gpu_error.c
2163
__i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags)
drivers/gpu/drm/i915/i915_gpu_error.c
2214
i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags)
drivers/gpu/drm/i915/i915_gpu_error.c
2261
intel_engine_mask_t engine_mask, u32 dump_flags)
drivers/gpu/drm/i915/i915_gpu_error.c
2313
intel_engine_mask_t engine_mask)
drivers/gpu/drm/i915/i915_gpu_error.h
266
intel_engine_mask_t engine_mask);
drivers/gpu/drm/i915/i915_gpu_error.h
269
intel_engine_mask_t engine_mask)
drivers/gpu/drm/i915/i915_gpu_error.h
280
intel_engine_mask_t engine_mask, u32 dump_flags);
drivers/gpu/drm/i915/i915_gpu_error.h
342
i915_capture_error_state(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags)
drivers/gpu/drm/i915/i915_perf.c
4911
intel_engine_mask_t tmp;
drivers/gpu/drm/i915/i915_request.c
1126
static intel_engine_mask_t
drivers/gpu/drm/i915/i915_request.c
1206
const intel_engine_mask_t mask = READ_ONCE(from->engine)->mask;
drivers/gpu/drm/i915/i915_request.h
272
intel_engine_mask_t execution_mask;
drivers/gpu/drm/i915/i915_scheduler_types.h
69
intel_engine_mask_t semaphores;
drivers/gpu/drm/i915/intel_device_info.c
393
BUILD_BUG_ON(BITS_PER_TYPE(intel_engine_mask_t) < I915_NUM_ENGINES);
drivers/gpu/drm/i915/intel_device_info.h
233
intel_engine_mask_t platform_engine_mask; /* Engines supported by the HW */
drivers/gpu/drm/i915/intel_uncore.c
2191
intel_engine_mask_t emask;