drivers/gpu/drm/i915/display/intel_cx0_phy.c

2294

intel_cx0_rmw(encoder, INTEL_CX0_BOTH_LANES, PHY_C10_VDR_CUSTOM_WIDTH,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2594

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C20_VDR_CUSTOM_WIDTH,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2599

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C20_VDR_CUSTOM_SERDES_RATE,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2607

intel_cx0_rmw(encoder, INTEL_CX0_BOTH_LANES, PHY_C20_VDR_HDMI_RATE,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2908

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C20_VDR_CUSTOM_SERDES_RATE,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

3137

intel_cx0_rmw(encoder, lane_mask, PHY_CX0_TX_CONTROL(tx, 2),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

3457

intel_cx0_rmw(encoder, lane_mask, PHY_CMN1_CONTROL(tx, 0),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

459

intel_cx0_rmw(encoder, lane_mask, PHY_C10_VDR_CONTROL(1),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

474

intel_cx0_rmw(encoder, lane_mask, PHY_C10_VDR_CONTROL(1),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

504

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_CMN(3),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

508

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_TX(1),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

523

intel_cx0_rmw(encoder, lane_mask, PHY_CX0_VDROVRD_CTL(lane, tx, 0),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

527

intel_cx0_rmw(encoder, lane_mask, PHY_CX0_VDROVRD_CTL(lane, tx, 1),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

531

intel_cx0_rmw(encoder, lane_mask, PHY_CX0_VDROVRD_CTL(lane, tx, 2),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

538

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_OVRD,

drivers/gpu/drm/i915/display/intel_cx0_phy.h

67

void intel_cx0_rmw(struct intel_encoder *encoder,

drivers/gpu/drm/i915/display/intel_lt_phy.c

986

intel_cx0_rmw(encoder, lane_mask, addr, clear, set, committed);