drivers/thermal/qcom/qcom-spmi-adc-tm5.c

65

#define ADC_TM5_M_ADC_CH_SEL_CTL(n) (ADC_TM5_M_CHAN_BASE + ((n) * 8) + 0)

drivers/thermal/qcom/qcom-spmi-adc-tm5.c

66

#define ADC_TM5_M_LOW_THR0(n) (ADC_TM5_M_CHAN_BASE + ((n) * 8) + 1)

drivers/thermal/qcom/qcom-spmi-adc-tm5.c

67

#define ADC_TM5_M_LOW_THR1(n) (ADC_TM5_M_CHAN_BASE + ((n) * 8) + 2)

drivers/thermal/qcom/qcom-spmi-adc-tm5.c

68

#define ADC_TM5_M_HIGH_THR0(n) (ADC_TM5_M_CHAN_BASE + ((n) * 8) + 3)

drivers/thermal/qcom/qcom-spmi-adc-tm5.c

69

#define ADC_TM5_M_HIGH_THR1(n) (ADC_TM5_M_CHAN_BASE + ((n) * 8) + 4)

drivers/thermal/qcom/qcom-spmi-adc-tm5.c

70

#define ADC_TM5_M_MEAS_INTERVAL_CTL(n) (ADC_TM5_M_CHAN_BASE + ((n) * 8) + 5)

drivers/thermal/qcom/qcom-spmi-adc-tm5.c

71

#define ADC_TM5_M_CTL(n) (ADC_TM5_M_CHAN_BASE + ((n) * 8) + 6)

drivers/thermal/qcom/qcom-spmi-adc-tm5.c

75

#define ADC_TM5_M_EN(n) (ADC_TM5_M_CHAN_BASE + ((n) * 8) + 7)