iommu_writel
iommu_writel(ctx, ARM_SMMU_CB_TLBSYNC, 0);
iommu_writel(ctx, ARM_SMMU_CB_S1_TLBIASID, ctx->asid);
iommu_writel(ctx, reg, iova);
iommu_writel(ctx, ARM_SMMU_CB_FSR, fsr);
iommu_writel(ctx, ARM_SMMU_CB_RESUME, ARM_SMMU_RESUME_TERMINATE);
iommu_writel(ctx, ARM_SMMU_CB_SCTLR, 0);
iommu_writel(ctx, ARM_SMMU_CB_FAR, 0);
iommu_writel(ctx, ARM_SMMU_CB_FSR, ARM_SMMU_CB_FSR_FAULT);
iommu_writel(ctx, ARM_SMMU_CB_TCR2,
iommu_writel(ctx, ARM_SMMU_CB_TCR,
iommu_writel(ctx, ARM_SMMU_CB_S1_MAIR0,
iommu_writel(ctx, ARM_SMMU_CB_S1_MAIR1,
iommu_writel(ctx, ARM_SMMU_CB_SCTLR, reg);
iommu_writel(ctx, ARM_SMMU_CB_SCTLR, 0);
iommu_writel(ctx, ARM_SMMU_CB_FSR, iommu_readl(ctx, ARM_SMMU_CB_FSR));