iommu_write_reg
iommu_write_reg(obj, p[i], i * sizeof(u32));
iommu_write_reg(obj, MMU_IRQ_TWL_MASK, MMU_IRQENABLE);
iommu_write_reg(obj, MMU_IRQ_TLB_MISS_MASK, MMU_IRQENABLE);
iommu_write_reg(obj, l, MMU_CNTL);
iommu_write_reg(obj, pa, MMU_TTB);
iommu_write_reg(obj, MMU_GP_REG_BUS_ERR_BACK_EN, MMU_GP_REG);
iommu_write_reg(obj, l, MMU_CNTL);
iommu_write_reg(obj, status, MMU_IRQSTATUS);
iommu_write_reg(obj, val, MMU_LOCK);
iommu_write_reg(obj, cr->cam | MMU_CAM_V, MMU_CAM);
iommu_write_reg(obj, cr->ram, MMU_RAM);
iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
iommu_write_reg(obj, 1, MMU_LD_TLB);
iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
iommu_write_reg(obj, 1, MMU_GFLUSH);
iommu_write_reg(obj, 0, MMU_IRQENABLE);