CLK_DIVIDER_POWER_OF_TWO
OWL_DIVIDER_HW(CMU_TLSCLK, 0, 4, CLK_DIVIDER_POWER_OF_TWO, NULL),
OWL_DIVIDER_HW(CMU_TLSCLK, 8, 4, CLK_DIVIDER_POWER_OF_TWO, NULL),
if (flags & CLK_DIVIDER_POWER_OF_TWO)
if (flags & CLK_DIVIDER_POWER_OF_TWO)
if (flags & CLK_DIVIDER_POWER_OF_TWO)
if (flags & CLK_DIVIDER_POWER_OF_TWO) {
if (flags & CLK_DIVIDER_POWER_OF_TWO)
if (flags & CLK_DIVIDER_POWER_OF_TWO)
if (flags & CLK_DIVIDER_POWER_OF_TWO)
NPCM7XX_CLK_S_TIMER, CLK_DIVIDER_POWER_OF_TWO, 0, NPCM7XX_CLK_ADC},
NPCM7XX_CLK_S_CPU_MUX, CLK_DIVIDER_POWER_OF_TWO, CLK_IS_CRITICAL,
NPCM7XX_CLK_S_AHB, CLK_DIVIDER_POWER_OF_TWO, 0, NPCM7XX_CLK_APB4},
NPCM7XX_CLK_S_AHB, CLK_DIVIDER_POWER_OF_TWO, 0, NPCM7XX_CLK_APB3},
NPCM7XX_CLK_S_AHB, CLK_DIVIDER_POWER_OF_TWO, 0, NPCM7XX_CLK_APB2},
NPCM7XX_CLK_S_AHB, CLK_DIVIDER_POWER_OF_TWO, 0, NPCM7XX_CLK_APB1},
NPCM7XX_CLK_S_AHB, CLK_DIVIDER_POWER_OF_TWO, 0, NPCM7XX_CLK_APB5},
{ NPCM8XX_CLKDIV1, 28, 3, "adc", &npcm8xx_pre_divs[0].hw, CLK_DIVIDER_READ_ONLY | CLK_DIVIDER_POWER_OF_TWO, 0, NPCM8XX_CLK_ADC },
{ NPCM8XX_CLKDIV2, 30, 2, "apb4", &npcm8xx_pre_divs[1].hw, CLK_DIVIDER_READ_ONLY | CLK_DIVIDER_POWER_OF_TWO, 0, NPCM8XX_CLK_APB4 },
{ NPCM8XX_CLKDIV2, 28, 2, "apb3", &npcm8xx_pre_divs[1].hw, CLK_DIVIDER_READ_ONLY | CLK_DIVIDER_POWER_OF_TWO, 0, NPCM8XX_CLK_APB3 },
{ NPCM8XX_CLKDIV2, 26, 2, "apb2", &npcm8xx_pre_divs[1].hw, CLK_DIVIDER_READ_ONLY | CLK_DIVIDER_POWER_OF_TWO, 0, NPCM8XX_CLK_APB2 },
{ NPCM8XX_CLKDIV2, 24, 2, "apb1", &npcm8xx_pre_divs[1].hw, CLK_DIVIDER_READ_ONLY | CLK_DIVIDER_POWER_OF_TWO, 0, NPCM8XX_CLK_APB1 },
{ NPCM8XX_CLKDIV2, 22, 2, "apb5", &npcm8xx_pre_divs[1].hw, CLK_DIVIDER_READ_ONLY | CLK_DIVIDER_POWER_OF_TWO, 0, NPCM8XX_CLK_APB5 },
{ NPCM8XX_THRTL_CNT, 0, 2, "th", &npcm8xx_muxes[0].hw, CLK_DIVIDER_READ_ONLY | CLK_DIVIDER_POWER_OF_TWO, 0, NPCM8XX_CLK_TH },
CLK_DIVIDER_POWER_OF_TWO,
base + RCC_CR, 3, 2, CLK_DIVIDER_POWER_OF_TWO,
.flags2 = CLK_DIVIDER_POWER_OF_TWO,
0x1c4, 24, 3, CLK_DIVIDER_POWER_OF_TWO),
CLK_DIVIDER_POWER_OF_TWO, NULL);
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = (CLK_DIVIDER_POWER_OF_TWO |
.flags = (CLK_DIVIDER_POWER_OF_TWO |
.flags = (CLK_DIVIDER_POWER_OF_TWO |
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = (CLK_DIVIDER_POWER_OF_TWO |
.flags = (CLK_DIVIDER_POWER_OF_TWO |
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
CLK_DIVIDER_POWER_OF_TWO,
if (mix->div_flags & CLK_DIVIDER_POWER_OF_TWO)
if (mix->div_flags & CLK_DIVIDER_POWER_OF_TWO)
if (mix->div_flags & CLK_DIVIDER_POWER_OF_TWO)
CLK_DIVIDER_POWER_OF_TWO, reg, shift,
CLK_DIVIDER_POWER_OF_TWO);
PX30_CLKSEL_CON(2), 7, 1, MFLAGS, 0, 3, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
RK2928_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
RK2928_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
RK2928_CLKSEL_CON(26), 8, 2, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
RK2928_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
RK2928_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
RK2928_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
RK2928_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
RK2928_CLKSEL_CON(1), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
RK2928_CLKSEL_CON(1), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
RK2928_CLKSEL_CON(1), 14, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
RK2928_CLKSEL_CON(1), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
RK2928_CLKSEL_CON(1), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
RK2928_CLKSEL_CON(1), 14, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
RK2928_CLKSEL_CON(26), 8, 2, MFLAGS, 0, 3, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
RK3288_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
RK3288_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
RK3328_CLKSEL_CON(3), 8, 2, MFLAGS, 0, 3, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
RK3368_CLKSEL_CON(9), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
RK3368_CLKSEL_CON(9), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
CLK_DIVIDER_POWER_OF_TWO),
if (flags & CLK_DIVIDER_POWER_OF_TWO)
_DIV(RCC_HSICFGR, 0, 2, CLK_DIVIDER_POWER_OF_TWO |
.div = _SUNXI_CCU_DIV_FLAGS(16, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(16, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(0, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(0, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(0, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(0, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(0, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(0, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(0, 2, CLK_DIVIDER_POWER_OF_TWO),
.div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
CLK_DIVIDER_POWER_OF_TWO), \
flags = data->div[i].pow ? CLK_DIVIDER_POWER_OF_TWO : 0;
data->pow ? CLK_DIVIDER_POWER_OF_TWO : 0,
CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
.flags = CLK_DIVIDER_POWER_OF_TWO,
if (div->flags & CLK_DIVIDER_POWER_OF_TWO)
if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
!(divider->flags & CLK_DIVIDER_POWER_OF_TWO))
div->flags |= CLK_DIVIDER_POWER_OF_TWO;
if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
ccf_flag |= CLK_DIVIDER_POWER_OF_TWO;
if (flags & CLK_DIVIDER_POWER_OF_TWO) {
0, 2, CLK_DIVIDER_POWER_OF_TWO, NULL);
0, 2, CLK_DIVIDER_POWER_OF_TWO, NULL);
CLK_DIVIDER_POWER_OF_TWO,
CLK_DIVIDER_POWER_OF_TWO);
CLK_DIVIDER_POWER_OF_TWO);
CLK_DIVIDER_POWER_OF_TWO);
spicc->pow2_div.flags = CLK_DIVIDER_POWER_OF_TWO;