Symbol: CLK_DIVIDER_HIWORD_MASK
drivers/clk/clk-divider.c
490
if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
drivers/clk/clk-divider.c
533
if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
drivers/clk/hisilicon/clk-hi3620.c
123
{ HI3620_SHAREAXI_DIV, "saxi_div", "saxi_mux", 0, 0x100, 0, 5, CLK_DIVIDER_HIWORD_MASK, NULL, },
drivers/clk/hisilicon/clk-hi3620.c
124
{ HI3620_CFGAXI_DIV, "cfgaxi_div", "saxi_div", 0, 0x100, 5, 2, CLK_DIVIDER_HIWORD_MASK, NULL, },
drivers/clk/hisilicon/clk-hi3620.c
125
{ HI3620_SD_DIV, "sd_div", "sd_mux", 0, 0x108, 0, 4, CLK_DIVIDER_HIWORD_MASK, NULL, },
drivers/clk/hisilicon/clk-hi3620.c
126
{ HI3620_MMC1_DIV, "mmc1_div", "mmc1_mux", 0, 0x108, 5, 4, CLK_DIVIDER_HIWORD_MASK, NULL, },
drivers/clk/hisilicon/clk-hi3620.c
127
{ HI3620_HSIC_DIV, "hsic_div", "rclk_hsic", 0, 0x130, 0, 2, CLK_DIVIDER_HIWORD_MASK, NULL, },
drivers/clk/hisilicon/clk-hi3620.c
128
{ HI3620_MMC2_DIV, "mmc2_div", "mmc2_mux", 0, 0x140, 0, 4, CLK_DIVIDER_HIWORD_MASK, NULL, },
drivers/clk/hisilicon/clk-hi3620.c
129
{ HI3620_MMC3_DIV, "mmc3_div", "mmc3_mux", 0, 0x140, 5, 4, CLK_DIVIDER_HIWORD_MASK, NULL, },
drivers/clk/hisilicon/clk-hi3660.c
336
CLK_SET_RATE_PARENT, 0xb0, 4, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
338
CLK_SET_RATE_PARENT, 0xb0, 8, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
340
CLK_SET_RATE_PARENT, 0xb0, 12, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
342
CLK_SET_RATE_PARENT, 0xb4, 3, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
344
CLK_SET_RATE_PARENT, 0xb8, 0, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
346
CLK_SET_RATE_PARENT, 0xbc, 0, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
348
CLK_SET_RATE_PARENT, 0xbc, 10, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
350
CLK_SET_RATE_PARENT, 0xc0, 0, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
352
CLK_SET_RATE_PARENT, 0xc0, 8, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
354
CLK_SET_RATE_PARENT, 0xc4, 12, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
356
CLK_SET_RATE_PARENT, 0xc8, 6, 5, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
358
CLK_SET_RATE_PARENT, 0xcc, 0, 5, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
360
CLK_SET_RATE_PARENT, 0xd0, 7, 5, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
362
CLK_SET_RATE_PARENT, 0xe8, 4, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
364
CLK_SET_RATE_PARENT, 0xe8, 9, 2, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
366
CLK_SET_RATE_PARENT, 0xec, 0, 2, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
368
CLK_SET_RATE_PARENT, 0xec, 2, 1, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
370
CLK_SET_RATE_PARENT, 0xec, 3, 1, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
372
CLK_SET_RATE_PARENT, 0xec, 14, 1, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
374
CLK_SET_RATE_PARENT, 0x100, 7, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
376
CLK_SET_RATE_PARENT, 0x108, 0, 2, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
378
CLK_SET_RATE_PARENT, 0x108, 11, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
423
CLK_SET_RATE_PARENT, 0x260, 11, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
425
CLK_SET_RATE_PARENT, 0x260, 12, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
427
CLK_SET_RATE_PARENT, 0x260, 13, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
429
CLK_SET_RATE_PARENT, 0x268, 11, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
449
CLK_SET_RATE_PARENT, 0x254, 0, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
451
CLK_SET_RATE_PARENT, 0x258, 10, 2, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
453
CLK_SET_RATE_PARENT, 0x258, 12, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3660.c
455
CLK_SET_RATE_PARENT, 0x268, 12, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
488
CLK_SET_RATE_PARENT, 0xEC, 0, 2, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
490
CLK_SET_RATE_PARENT, 0x0EC, 2, 1, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
492
CLK_SET_RATE_PARENT, 0x0EC, 3, 1, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
494
CLK_SET_RATE_PARENT, 0xb4, 6, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
496
CLK_SET_RATE_PARENT, 0x0BC, 0, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
498
CLK_SET_RATE_PARENT, 0xB8, 0, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
500
CLK_SET_RATE_PARENT, 0xC0, 0, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
502
CLK_SET_RATE_PARENT, 0xB0, 12, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
504
CLK_SET_RATE_PARENT, 0xB0, 8, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
506
CLK_SET_RATE_PARENT, 0xB0, 4, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
508
CLK_SET_RATE_PARENT, 0xE8, 4, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
510
CLK_SET_RATE_PARENT, 0xC4, 12, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
512
CLK_SET_RATE_PARENT, 0xb4, 0, 5, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
514
CLK_SET_RATE_PARENT, 0x108, 6, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
516
CLK_SET_RATE_PARENT, 0xD4, 0, 5, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
518
CLK_SET_RATE_PARENT, 0xD4, 10, 5, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
520
CLK_SET_RATE_PARENT, 0xD8, 0, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
522
CLK_SET_RATE_PARENT, 0xe0, 4, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
524
CLK_SET_RATE_PARENT, 0xe0, 10, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
526
CLK_SET_RATE_PARENT, 0xBC, 11, 4, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
528
CLK_SET_RATE_PARENT, 0xC4, 0, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
530
CLK_SET_RATE_PARENT, 0xC0, 8, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
532
CLK_SET_RATE_PARENT, 0x108, 0, 2, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
534
CLK_SET_RATE_PARENT, 0x10C, 14, 2, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
536
CLK_SET_RATE_PARENT, 0x10C, 11, 2, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
538
CLK_SET_RATE_PARENT, 0xE4, 9, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
653
CLK_SET_RATE_PARENT, 0x254, 0, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
655
CLK_SET_RATE_PARENT, 0x274, 0, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
657
CLK_SET_RATE_PARENT, 0x270, 0, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
659
CLK_SET_RATE_PARENT, 0x254, 6, 3, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
661
CLK_SET_RATE_PARENT, 0x254, 9, 3, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
663
CLK_SET_RATE_PARENT, 0x268, 0, 3, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
665
CLK_SET_RATE_PARENT, 0x250, 0, 3, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
802
CLK_SET_RATE_PARENT, 0x74, 0, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
804
CLK_SET_RATE_PARENT, 0x68, 0, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
806
CLK_SET_RATE_PARENT, 0x60, 0, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
808
CLK_SET_RATE_PARENT, 0x64, 0, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
810
CLK_SET_RATE_PARENT, 0x7C, 10, 6, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/hisilicon/clk-hi3670.c
812
CLK_SET_RATE_PARENT, 0x78, 0, 2, CLK_DIVIDER_HIWORD_MASK, },
drivers/clk/renesas/rzg2l-cpg.h
165
.flag = CLK_DIVIDER_HIWORD_MASK)
drivers/clk/renesas/rzv2h-cpg.h
226
.flag = CLK_DIVIDER_HIWORD_MASK)
drivers/clk/rockchip/clk-half-divider.c
127
if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
drivers/clk/rockchip/clk-px30.c
205
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rk3036.c
147
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rk3128.c
170
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rk3188.c
238
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rk3228.c
180
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rk3288.c
246
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rk3308.c
195
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rk3328.c
233
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rk3368.c
152
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rk3399.c
241
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rk3506.c
151
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rk3528.c
204
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rk3562.c
147
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rk3568.c
351
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rk3576.c
277
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rk3588.c
521
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rv1108.c
163
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rv1126.c
212
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/rockchip/clk-rv1126b.c
176
#define DFLAGS CLK_DIVIDER_HIWORD_MASK
drivers/clk/sophgo/clk-sg2042-clkgen.c
230
if (divider->div_flags & CLK_DIVIDER_HIWORD_MASK) {
drivers/clk/sophgo/clk-sg2042-clkgen.c
819
if (div->div_flags & CLK_DIVIDER_HIWORD_MASK) {
drivers/clk/stm32/clk-stm32-core.c
244
if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
drivers/clk/zynqmp/divider.c
254
ccf_flag |= CLK_DIVIDER_HIWORD_MASK;