drivers/accel/amdxdna/aie2_pci.c

480

struct init_config xrs_cfg = { 0 };

drivers/accel/amdxdna/aie2_solver.c

372

void *xrsm_init(struct init_config *cfg)

drivers/accel/amdxdna/aie2_solver.c

46

struct init_config cfg;

drivers/accel/amdxdna/aie2_solver.h

127

void *xrsm_init(struct init_config *cfg);

drivers/crypto/intel/qat/qat_common/adf_common_drv.h

51

int adf_dev_up(struct adf_accel_dev *accel_dev, bool init_config);

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

254

struct ras_core_config init_config;

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

256

memset(&init_config, 0, sizeof(init_config));

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

258

init_config.umc_ip_version = amdgpu_ip_version(adev, UMC_HWIP, 0);

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

259

init_config.mp1_ip_version = amdgpu_ip_version(adev, MP1_HWIP, 0);

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

260

init_config.gfx_ip_version = amdgpu_ip_version(adev, GC_HWIP, 0);

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

261

init_config.nbio_ip_version = amdgpu_ip_version(adev, NBIO_HWIP, 0);

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

262

init_config.psp_ip_version = amdgpu_ip_version(adev, MP1_HWIP, 0);

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

264

if (init_config.umc_ip_version == IP_VERSION(12, 0, 0) ||

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

265

init_config.umc_ip_version == IP_VERSION(12, 5, 0))

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

266

init_config.aca_ip_version = IP_VERSION(1, 0, 0);

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

268

init_config.sys_fn = &amdgpu_ras_sys_fn;

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

269

init_config.ras_eeprom_supported = true;

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

270

init_config.poison_supported =

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

273

amdgpu_ras_mgr_init_aca_config(adev, &init_config);

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

274

amdgpu_ras_mgr_init_eeprom_config(adev, &init_config);

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

275

amdgpu_ras_mgr_init_mp1_config(adev, &init_config);

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

276

amdgpu_ras_mgr_init_nbio_config(adev, &init_config);

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

277

amdgpu_ras_mgr_init_psp_config(adev, &init_config);

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

278

amdgpu_ras_mgr_init_umc_config(adev, &init_config);

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

280

return ras_core_create(&init_config);

drivers/gpu/drm/amd/ras/rascore/ras.h

351

struct ras_core_context *ras_core_create(struct ras_core_config *init_config);

drivers/gpu/drm/amd/ras/rascore/ras_core.c

278

struct ras_core_context *ras_core_create(struct ras_core_config *init_config)

drivers/gpu/drm/amd/ras/rascore/ras_core.c

283

if (!init_config)

drivers/gpu/drm/amd/ras/rascore/ras_core.c

296

memcpy(config, init_config, sizeof(*config));

drivers/iio/light/veml6040.c

210

const int init_config =

drivers/iio/light/veml6040.c

244

ret = regmap_write(regmap, VEML6040_CONF_REG, init_config);

drivers/net/wireless/marvell/mwifiex/sta_cmd.c

1790

struct mwifiex_tdls_config *init_config;

drivers/net/wireless/marvell/mwifiex/sta_cmd.c

1800

init_config = data_buf;

drivers/net/wireless/marvell/mwifiex/sta_cmd.c

1801

len = sizeof(*init_config);

drivers/net/wireless/marvell/mwifiex/sta_cmd.c

1802

memcpy(tdls_config->tdls_data, init_config, len);

sound/soc/sof/ipc4-topology.c

1274

process->init_config = FIELD_GET(SOF_IPC4_MODULE_INIT_CONFIG_MASK,

sound/soc/sof/ipc4-topology.c

1280

if (process->init_config == SOF_IPC4_MODULE_INIT_CONFIG_TYPE_BASE_CFG_WITH_EXT) {

sound/soc/sof/ipc4-topology.c

2897

if (process->init_config == SOF_IPC4_MODULE_INIT_CONFIG_TYPE_BASE_CFG_WITH_EXT) {

sound/soc/sof/ipc4-topology.c

390

if (process->init_config != SOF_IPC4_MODULE_INIT_CONFIG_TYPE_BASE_CFG_WITH_EXT)

sound/soc/sof/ipc4-topology.h

531

u32 init_config;