CLK_CTL
rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ);
rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,
err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0);
rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ);
rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0);
rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ);
rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,
err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0);
rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ);
rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,
err = rtsx_pci_write_register(pcr, CLK_CTL, CHANGE_CLK, 0);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,
err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0);
rtsx_pci_write_register(pcr, CLK_CTL, CHANGE_CLK, CHANGE_CLK);
rtsx_pci_write_register(pcr, CLK_CTL, CHANGE_CLK, 0);