drivers/gpu/drm/i915/display/intel_de.h

203

intel_uncore_write_fw(__to_uncore(display), reg, val);

drivers/gpu/drm/i915/gt/intel_engine_cs.c

1631

intel_uncore_write_fw(uncore, mode, _MASKED_BIT_ENABLE(STOP_RING));

drivers/gpu/drm/i915/gt/intel_engine_cs.c

1638

intel_uncore_write_fw(uncore, RING_MODE_GEN7(engine->mmio_base),

drivers/gpu/drm/i915/gt/intel_ggtt.c

197

intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);

drivers/gpu/drm/i915/gt/intel_ggtt.c

228

intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6,

drivers/gpu/drm/i915/gt/intel_ggtt.c

252

intel_uncore_write_fw(gt->uncore,

drivers/gpu/drm/i915/gt/intel_ggtt.c

256

intel_uncore_write_fw(gt->uncore,

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

106

intel_uncore_write_fw(uncore, fence_reg_lo, 0);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

109

intel_uncore_write_fw(uncore, fence_reg_hi, upper_32_bits(val));

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

110

intel_uncore_write_fw(uncore, fence_reg_lo, lower_32_bits(val));

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

144

intel_uncore_write_fw(uncore, reg, val);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

169

intel_uncore_write_fw(uncore, reg, val);

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

224

intel_uncore_write_fw(uncore, MTL_MCR_SELECTOR,

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

252

intel_uncore_write_fw(uncore, GEN8_MCR_SELECTOR, mcr);

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

262

intel_uncore_write_fw(uncore, GEN8_MCR_SELECTOR, mcr);

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

268

intel_uncore_write_fw(uncore, mcr_reg_cast(reg), value);

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

277

intel_uncore_write_fw(uncore, MTL_MCR_SELECTOR, GEN11_MCR_MULTICAST);

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

279

intel_uncore_write_fw(uncore, GEN8_MCR_SELECTOR, old_mcr);

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

396

intel_uncore_write_fw(gt->uncore, MTL_STEER_SEMAPHORE, 0x1);

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

421

intel_uncore_write_fw(gt->uncore, MTL_STEER_SEMAPHORE, 0x1);

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

484

intel_uncore_write_fw(gt->uncore, MTL_MCR_SELECTOR, GEN11_MCR_MULTICAST);

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

513

intel_uncore_write_fw(gt->uncore, MTL_MCR_SELECTOR, GEN11_MCR_MULTICAST);

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

515

intel_uncore_write_fw(gt->uncore, mcr_reg_cast(reg), value);

drivers/gpu/drm/i915/gt/intel_mocs.c

565

intel_uncore_write_fw(uncore, _MMIO(addr + i * 4), mocs);

drivers/gpu/drm/i915/gt/intel_mocs.c

627

intel_uncore_write_fw(gt->uncore, GEN9_LNCFCMOCS(i), l3cc);

drivers/gpu/drm/i915/gt/intel_rc6.c

106

intel_uncore_write_fw(uncore, GEN9_MEDIA_PG_IDLE_HYSTERESIS, 60);

drivers/gpu/drm/i915/gt/intel_rc6.c

107

intel_uncore_write_fw(uncore, GEN9_RENDER_PG_IDLE_HYSTERESIS, 60);

drivers/gpu/drm/i915/gt/intel_rc6.c

135

intel_uncore_write_fw(uncore, GEN9_PG_ENABLE, pg_enable);

drivers/gpu/drm/i915/gt/intel_rc6.c

146

intel_uncore_write_fw(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16 | 85);

drivers/gpu/drm/i915/gt/intel_rc6.c

147

intel_uncore_write_fw(uncore, GEN10_MEDIA_WAKE_RATE_LIMIT, 150);

drivers/gpu/drm/i915/gt/intel_rc6.c

153

intel_uncore_write_fw(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 108 << 16);

drivers/gpu/drm/i915/gt/intel_rc6.c

155

intel_uncore_write_fw(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16);

drivers/gpu/drm/i915/gt/intel_rc6.c

158

intel_uncore_write_fw(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */

drivers/gpu/drm/i915/gt/intel_rc6.c

159

intel_uncore_write_fw(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */

drivers/gpu/drm/i915/gt/intel_rc6.c

161

intel_uncore_write_fw(uncore, RING_MAX_IDLE(engine->mmio_base), 10);

drivers/gpu/drm/i915/gt/intel_rc6.c

163

intel_uncore_write_fw(uncore, GUC_MAX_IDLE_COUNT, 0xA);

drivers/gpu/drm/i915/gt/intel_rc6.c

165

intel_uncore_write_fw(uncore, GEN6_RC_SLEEP, 0);

drivers/gpu/drm/i915/gt/intel_rc6.c

188

intel_uncore_write_fw(uncore, GEN9_MEDIA_PG_IDLE_HYSTERESIS, 250);

drivers/gpu/drm/i915/gt/intel_rc6.c

189

intel_uncore_write_fw(uncore, GEN9_RENDER_PG_IDLE_HYSTERESIS, 250);

drivers/gpu/drm/i915/gt/intel_rc6.c

192

intel_uncore_write_fw(uncore, GEN6_RC6_THRESHOLD, 37500); /* 37.5/125ms per EI */

drivers/gpu/drm/i915/gt/intel_rc6.c

204

intel_uncore_write_fw(uncore, GEN9_PG_ENABLE,

drivers/gpu/drm/i915/gt/intel_rc6.c

215

intel_uncore_write_fw(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 40 << 16);

drivers/gpu/drm/i915/gt/intel_rc6.c

216

intel_uncore_write_fw(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */

drivers/gpu/drm/i915/gt/intel_rc6.c

217

intel_uncore_write_fw(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */

drivers/gpu/drm/i915/gt/intel_rc6.c

219

intel_uncore_write_fw(uncore, RING_MAX_IDLE(engine->mmio_base), 10);

drivers/gpu/drm/i915/gt/intel_rc6.c

220

intel_uncore_write_fw(uncore, GEN6_RC_SLEEP, 0);

drivers/gpu/drm/i915/gt/intel_rc6.c

221

intel_uncore_write_fw(uncore, GEN6_RC6_THRESHOLD, 625); /* 800us/1.28 for TO */

drivers/gpu/drm/i915/gt/intel_rc6.c

239

intel_uncore_write_fw(uncore, GEN6_RC1_WAKE_RATE_LIMIT, 1000 << 16);

drivers/gpu/drm/i915/gt/intel_rc6.c

240

intel_uncore_write_fw(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 40 << 16 | 30);

drivers/gpu/drm/i915/gt/intel_rc6.c

241

intel_uncore_write_fw(uncore, GEN6_RC6pp_WAKE_RATE_LIMIT, 30);

drivers/gpu/drm/i915/gt/intel_rc6.c

242

intel_uncore_write_fw(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000);

drivers/gpu/drm/i915/gt/intel_rc6.c

243

intel_uncore_write_fw(uncore, GEN6_RC_IDLE_HYSTERSIS, 25);

drivers/gpu/drm/i915/gt/intel_rc6.c

246

intel_uncore_write_fw(uncore, RING_MAX_IDLE(engine->mmio_base), 10);

drivers/gpu/drm/i915/gt/intel_rc6.c

248

intel_uncore_write_fw(uncore, GEN6_RC_SLEEP, 0);

drivers/gpu/drm/i915/gt/intel_rc6.c

249

intel_uncore_write_fw(uncore, GEN6_RC1e_THRESHOLD, 1000);

drivers/gpu/drm/i915/gt/intel_rc6.c

250

intel_uncore_write_fw(uncore, GEN6_RC6_THRESHOLD, 50000);

drivers/gpu/drm/i915/gt/intel_rc6.c

251

intel_uncore_write_fw(uncore, GEN6_RC6p_THRESHOLD, 150000);

drivers/gpu/drm/i915/gt/intel_rc6.c

252

intel_uncore_write_fw(uncore, GEN6_RC6pp_THRESHOLD, 64000); /* unused */

drivers/gpu/drm/i915/gt/intel_rc6.c

366

intel_uncore_write_fw(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 40 << 16);

drivers/gpu/drm/i915/gt/intel_rc6.c

367

intel_uncore_write_fw(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */

drivers/gpu/drm/i915/gt/intel_rc6.c

368

intel_uncore_write_fw(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */

drivers/gpu/drm/i915/gt/intel_rc6.c

371

intel_uncore_write_fw(uncore, RING_MAX_IDLE(engine->mmio_base), 10);

drivers/gpu/drm/i915/gt/intel_rc6.c

372

intel_uncore_write_fw(uncore, GEN6_RC_SLEEP, 0);

drivers/gpu/drm/i915/gt/intel_rc6.c

375

intel_uncore_write_fw(uncore, GEN6_RC6_THRESHOLD, 0x186);

drivers/gpu/drm/i915/gt/intel_rc6.c

378

intel_uncore_write_fw(uncore, VLV_COUNTER_CONTROL,

drivers/gpu/drm/i915/gt/intel_rc6.c

393

intel_uncore_write_fw(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 0x00280000);

drivers/gpu/drm/i915/gt/intel_rc6.c

394

intel_uncore_write_fw(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000);

drivers/gpu/drm/i915/gt/intel_rc6.c

395

intel_uncore_write_fw(uncore, GEN6_RC_IDLE_HYSTERSIS, 25);

drivers/gpu/drm/i915/gt/intel_rc6.c

398

intel_uncore_write_fw(uncore, RING_MAX_IDLE(engine->mmio_base), 10);

drivers/gpu/drm/i915/gt/intel_rc6.c

400

intel_uncore_write_fw(uncore, GEN6_RC6_THRESHOLD, 0x557);

drivers/gpu/drm/i915/gt/intel_rc6.c

403

intel_uncore_write_fw(uncore, VLV_COUNTER_CONTROL,

drivers/gpu/drm/i915/gt/intel_rc6.c

568

intel_uncore_write_fw(uncore, GEN9_PG_ENABLE, 0);

drivers/gpu/drm/i915/gt/intel_rc6.c

569

intel_uncore_write_fw(uncore, GEN6_RC_CONTROL, 0);

drivers/gpu/drm/i915/gt/intel_rc6.c

570

intel_uncore_write_fw(uncore, GEN6_RC_STATE, 0);

drivers/gpu/drm/i915/gt/intel_rc6.c

681

intel_uncore_write_fw(uncore, GEN6_RC_CONTROL, rc6->ctl_enable);

drivers/gpu/drm/i915/gt/intel_rc6.c

701

intel_uncore_write_fw(uncore, GEN6_RC_CONTROL, GEN6_RC_CTL_RC6_ENABLE);

drivers/gpu/drm/i915/gt/intel_rc6.c

709

intel_uncore_write_fw(uncore, GEN6_RC_STATE, target << RC_SW_TARGET_STATE_SHIFT);

drivers/gpu/drm/i915/gt/intel_rc6.c

73

intel_uncore_write_fw(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16 | 85);

drivers/gpu/drm/i915/gt/intel_rc6.c

732

intel_uncore_write_fw(uncore, GEN6_RC_STATE, rc6->bios_rc_state);

drivers/gpu/drm/i915/gt/intel_rc6.c

74

intel_uncore_write_fw(uncore, GEN10_MEDIA_WAKE_RATE_LIMIT, 150);

drivers/gpu/drm/i915/gt/intel_rc6.c

76

intel_uncore_write_fw(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */

drivers/gpu/drm/i915/gt/intel_rc6.c

763

intel_uncore_write_fw(uncore, VLV_COUNTER_CONTROL,

drivers/gpu/drm/i915/gt/intel_rc6.c

769

intel_uncore_write_fw(uncore, VLV_COUNTER_CONTROL,

drivers/gpu/drm/i915/gt/intel_rc6.c

77

intel_uncore_write_fw(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */

drivers/gpu/drm/i915/gt/intel_rc6.c

773

intel_uncore_write_fw(uncore, VLV_COUNTER_CONTROL,

drivers/gpu/drm/i915/gt/intel_rc6.c

79

intel_uncore_write_fw(uncore, RING_MAX_IDLE(engine->mmio_base), 10);

drivers/gpu/drm/i915/gt/intel_rc6.c

81

intel_uncore_write_fw(uncore, GUC_MAX_IDLE_COUNT, 0xA);

drivers/gpu/drm/i915/gt/intel_rc6.c

83

intel_uncore_write_fw(uncore, GEN6_RC_SLEEP, 0);

drivers/gpu/drm/i915/gt/intel_rc6.c

85

intel_uncore_write_fw(uncore, GEN6_RC6_THRESHOLD, 50000); /* 50/125ms per EI */

drivers/gpu/drm/i915/gt/intel_reset.c

237

intel_uncore_write_fw(uncore, ILK_GDSR,

drivers/gpu/drm/i915/gt/intel_reset.c

248

intel_uncore_write_fw(uncore, ILK_GDSR,

drivers/gpu/drm/i915/gt/intel_reset.c

260

intel_uncore_write_fw(uncore, ILK_GDSR, 0);

drivers/gpu/drm/i915/gt/intel_reset.c

296

intel_uncore_write_fw(uncore, GEN6_GDRST, hw_domain_mask);

drivers/gpu/drm/i915/gt/intel_reset.c

589

intel_uncore_write_fw(uncore, reg, _MASKED_BIT_ENABLE(request));

drivers/gpu/drm/i915/gt/intel_reset.c

603

intel_uncore_write_fw(engine->uncore,

drivers/gpu/drm/i915/gt/intel_ring_submission.c

1055

intel_uncore_write_fw(uncore, RING_PSMI_CTL(GEN6_BSD_RING_BASE),

drivers/gpu/drm/i915/gt/intel_ring_submission.c

1076

intel_uncore_write_fw(uncore, RING_PSMI_CTL(GEN6_BSD_RING_BASE),

drivers/gpu/drm/i915/gt/intel_ring_submission.c

114

intel_uncore_write_fw(engine->uncore, hwsp, offset);

drivers/gpu/drm/i915/gt/intel_rps.c

1246

intel_uncore_write_fw(uncore, GEN6_RC_VIDEO_FREQ,

drivers/gpu/drm/i915/gt/intel_rps.c

1249

intel_uncore_write_fw(uncore, GEN6_RP_IDLE_HYSTERSIS, 0xa);

drivers/gpu/drm/i915/gt/intel_rps.c

1260

intel_uncore_write_fw(uncore, GEN6_RC_VIDEO_FREQ,

drivers/gpu/drm/i915/gt/intel_rps.c

1263

intel_uncore_write_fw(uncore, GEN6_RP_IDLE_HYSTERSIS, 10);

drivers/gpu/drm/i915/gt/intel_rps.c

1275

intel_uncore_write_fw(uncore, GEN6_RP_DOWN_TIMEOUT, 50000);

drivers/gpu/drm/i915/gt/intel_rps.c

1276

intel_uncore_write_fw(uncore, GEN6_RP_IDLE_HYSTERSIS, 10);

drivers/gpu/drm/i915/gt/intel_rps.c

1352

intel_uncore_write_fw(uncore, GEN6_RP_DOWN_TIMEOUT, 1000000);

drivers/gpu/drm/i915/gt/intel_rps.c

1353

intel_uncore_write_fw(uncore, GEN6_RP_UP_THRESHOLD, 59400);

drivers/gpu/drm/i915/gt/intel_rps.c

1354

intel_uncore_write_fw(uncore, GEN6_RP_DOWN_THRESHOLD, 245000);

drivers/gpu/drm/i915/gt/intel_rps.c

1355

intel_uncore_write_fw(uncore, GEN6_RP_UP_EI, 66000);

drivers/gpu/drm/i915/gt/intel_rps.c

1356

intel_uncore_write_fw(uncore, GEN6_RP_DOWN_EI, 350000);

drivers/gpu/drm/i915/gt/intel_rps.c

1358

intel_uncore_write_fw(uncore, GEN6_RP_IDLE_HYSTERSIS, 10);

drivers/gpu/drm/i915/gt/intel_rps.c

1361

intel_uncore_write_fw(uncore, GEN6_RP_CONTROL,

drivers/gpu/drm/i915/gt/intel_rps.c

1455

intel_uncore_write_fw(uncore, GEN6_RP_DOWN_TIMEOUT, 1000000);

drivers/gpu/drm/i915/gt/intel_rps.c

1456

intel_uncore_write_fw(uncore, GEN6_RP_UP_THRESHOLD, 59400);

drivers/gpu/drm/i915/gt/intel_rps.c

1457

intel_uncore_write_fw(uncore, GEN6_RP_DOWN_THRESHOLD, 245000);

drivers/gpu/drm/i915/gt/intel_rps.c

1458

intel_uncore_write_fw(uncore, GEN6_RP_UP_EI, 66000);

drivers/gpu/drm/i915/gt/intel_rps.c

1459

intel_uncore_write_fw(uncore, GEN6_RP_DOWN_EI, 350000);

drivers/gpu/drm/i915/gt/intel_rps.c

1461

intel_uncore_write_fw(uncore, GEN6_RP_IDLE_HYSTERSIS, 10);

drivers/gpu/drm/i915/gt/intel_rps.c

1463

intel_uncore_write_fw(uncore, GEN6_RP_CONTROL,

drivers/gpu/drm/i915/gt/intel_rps.c

76

intel_uncore_write_fw(uncore, reg, val);

drivers/gpu/drm/i915/gt/intel_tlb.c

76

intel_uncore_write_fw(uncore,

drivers/gpu/drm/i915/gt/intel_tlb.c

92

intel_uncore_write_fw(uncore, GEN12_OA_TLB_INV_CR, 1);

drivers/gpu/drm/i915/gt/intel_workarounds.c

1788

intel_uncore_write_fw(uncore, wa->reg, val);

drivers/gpu/drm/i915/gt/selftest_rps.c

278

intel_uncore_write_fw(gt->uncore, GEN6_RP_CUR_UP_EI, 0);

drivers/gpu/drm/i915/gt/selftest_rps.c

281

intel_uncore_write_fw(gt->uncore,

drivers/gpu/drm/i915/gt/selftest_rps.c

283

intel_uncore_write_fw(gt->uncore,

drivers/gpu/drm/i915/gt/selftest_rps.c

286

intel_uncore_write_fw(gt->uncore, GEN6_RP_CONTROL,

drivers/gpu/drm/i915/gt/selftest_rps.c

322

intel_uncore_write_fw(gt->uncore, GEN6_RP_CONTROL, 0);

drivers/gpu/drm/i915/gt/uc/intel_guc.c

973

intel_uncore_write_fw(gt->uncore, GEN11_SOFT_SCRATCH(0), 0);

drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c

1052

intel_uncore_write_fw(uncore, DMA_ADDR_0_LOW, lower_32_bits(offset));

drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c

1053

intel_uncore_write_fw(uncore, DMA_ADDR_0_HIGH, upper_32_bits(offset));

drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c

1056

intel_uncore_write_fw(uncore, DMA_ADDR_1_LOW, dst_offset);

drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c

1057

intel_uncore_write_fw(uncore, DMA_ADDR_1_HIGH, DMA_ADDRESS_SPACE_WOPCM);

drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c

1063

intel_uncore_write_fw(uncore, DMA_COPY_SIZE,

drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c

1067

intel_uncore_write_fw(uncore, DMA_CTRL,

drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c

1078

intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags));

drivers/gpu/drm/i915/gvt/mmio_context.c

398

intel_uncore_write_fw(uncore, reg, 0x1);

drivers/gpu/drm/i915/gvt/mmio_context.c

447

intel_uncore_write_fw(uncore, offset, new_v);

drivers/gpu/drm/i915/gvt/mmio_context.c

465

intel_uncore_write_fw(uncore, l3_offset, new_v);

drivers/gpu/drm/i915/gvt/mmio_context.c

548

intel_uncore_write_fw(uncore, mmio->reg, new_v);

drivers/gpu/drm/i915/intel_pcode.c

74

intel_uncore_write_fw(uncore, GEN6_PCODE_DATA, *val);

drivers/gpu/drm/i915/intel_pcode.c

75

intel_uncore_write_fw(uncore, GEN6_PCODE_DATA1, val1 ? *val1 : 0);

drivers/gpu/drm/i915/intel_pcode.c

76

intel_uncore_write_fw(uncore,

drivers/gpu/drm/i915/intel_uncore.c

2656

intel_uncore_write_fw(uncore, GU_DEBUG, DRIVERFLR_STATUS);

drivers/gpu/drm/i915/intel_uncore.c

2680

intel_uncore_write_fw(uncore, GU_DEBUG, DRIVERFLR_STATUS);

drivers/gpu/drm/i915/intel_uncore.h

449

intel_uncore_write_fw(uncore, reg, val);

drivers/gpu/drm/i915/selftests/i915_selftest.c

275

intel_uncore_write_fw(uncore, GEN9_PG_ENABLE,

drivers/gpu/drm/i915/vlv_iosf_sb.c

109

intel_uncore_write_fw(uncore, VLV_IOSF_ADDR, addr);

drivers/gpu/drm/i915/vlv_iosf_sb.c

110

intel_uncore_write_fw(uncore, VLV_IOSF_DATA, is_read ? 0 : *val);

drivers/gpu/drm/i915/vlv_iosf_sb.c

111

intel_uncore_write_fw(uncore, VLV_IOSF_DOORBELL_REQ,