drivers/gpu/drm/i915/display/intel_ddi.c

1497

if (intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

2599

if (intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_ddi.c

2731

if (!is_mst && intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

2878

if (!is_mst && intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

3148

if (is_mst || intel_dp_is_uhbr(old_crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

3246

if (!is_hdmi && intel_dp_is_uhbr(old_crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

3523

if (!is_hdmi && intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

3538

if (!is_hdmi && intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

370

if (intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_ddi.c

3746

intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

3799

intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

499

if (enable && intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_ddi.c

592

intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_ddi.c

593

if (intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c

1747

intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c

1766

if (intel_crtc_has_dp_encoder(crtc_state) && intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c

1779

if (intel_crtc_has_dp_encoder(crtc_state) && intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp.c

2333

if (intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp.c

2809

if (!ret && intel_dp_is_uhbr(pipe_config))

drivers/gpu/drm/i915/display/intel_dp.c

3245

intel_dp_is_uhbr(pipe_config);

drivers/gpu/drm/i915/display/intel_dp.c

3285

int symbol_size = intel_dp_is_uhbr(crtc_state) ? 32 : 8;

drivers/gpu/drm/i915/display/intel_dp.c

3290

int min_sym_cycles = intel_dp_is_uhbr(crtc_state) ? 3 : 5;

drivers/gpu/drm/i915/display/intel_dp.c

3303

if (!is_mst && !intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp.c

3347

if (intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_dp.c

3420

if (intel_dp_is_uhbr(pipe_config)) {

drivers/gpu/drm/i915/display/intel_dp.c

3457

if (!intel_dp_is_uhbr(pipe_config)) {

drivers/gpu/drm/i915/display/intel_dp.h

88

bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1037

intel_dp_is_uhbr(crtc_state));

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1147

if (intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1665

if (intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1720

if (!intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp_link_training.c

452

if (intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp_link_training.c

492

if (intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_dp_link_training.c

611

if (intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_dp_link_training.c

701

if (intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_dp_link_training.c

784

if (intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp_link_training.c

899

if (intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_dp_link_training.c

943

intel_dp_is_uhbr(crtc_state));

drivers/gpu/drm/i915/display/intel_dp_mst.c

1229

if (crtc_state->fec_enable || intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp_mst.c

1234

if (intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp_mst.c

1239

if (crtc_state->fec_enable || intel_dp_is_uhbr(crtc_state))

drivers/gpu/drm/i915/display/intel_dp_mst.c

1267

if (intel_dp_is_uhbr(pipe_config)) {

drivers/gpu/drm/i915/display/intel_dp_mst.c

149

if (!intel_dp_is_uhbr(crtc_state) || DISPLAY_VER(display) >= 20 || !dsc)

drivers/gpu/drm/i915/display/intel_dp_mst.c

241

u8 link_coding_cap = intel_dp_is_uhbr(crtc_state) ?

drivers/gpu/drm/i915/display/intel_psr.c

1790

if (intel_dp_is_uhbr(crtc_state)) {

drivers/gpu/drm/i915/display/intel_psr.c

2814

hactive_limit = intel_dp_is_uhbr(crtc_state) ? 1230 : 546;

drivers/gpu/drm/i915/display/intel_psr.c

2816

hactive_limit = intel_dp_is_uhbr(crtc_state) ? 615 : 273;