drivers/gpu/drm/i915/display/intel_cx0_phy.c

2300

intel_cx0_write(encoder, INTEL_CX0_LANE0, PHY_C10_VDR_PLL(i),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2304

intel_cx0_write(encoder, INTEL_CX0_LANE0, PHY_C10_VDR_CMN(0), pll_state->cmn, MB_WRITE_COMMITTED);

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2305

intel_cx0_write(encoder, INTEL_CX0_LANE0, PHY_C10_VDR_TX(0), pll_state->tx, MB_WRITE_COMMITTED);

drivers/gpu/drm/i915/display/intel_cx0_phy.c

374

intel_cx0_write(encoder, lane, PHY_C20_WR_ADDRESS_H, addr >> 8, 0);

drivers/gpu/drm/i915/display/intel_cx0_phy.c

375

intel_cx0_write(encoder, lane, PHY_C20_WR_ADDRESS_L, addr & 0xff, 0);

drivers/gpu/drm/i915/display/intel_cx0_phy.c

377

intel_cx0_write(encoder, lane, PHY_C20_WR_DATA_H, data >> 8, 0);

drivers/gpu/drm/i915/display/intel_cx0_phy.c

378

intel_cx0_write(encoder, lane, PHY_C20_WR_DATA_L, data & 0xff, 1);

drivers/gpu/drm/i915/display/intel_cx0_phy.c

389

intel_cx0_write(encoder, lane, PHY_C20_RD_ADDRESS_H, addr >> 8, 0);

drivers/gpu/drm/i915/display/intel_cx0_phy.c

390

intel_cx0_write(encoder, lane, PHY_C20_RD_ADDRESS_L, addr & 0xff, 1);

drivers/gpu/drm/i915/display/intel_cx0_phy.h

68

void intel_cx0_write(struct intel_encoder *encoder,

drivers/gpu/drm/i915/display/intel_lt_phy.c

1032

intel_cx0_write(encoder, lane_mask, addr, data, committed);