drivers/gpu/drm/i915/display/intel_cx0_phy.c

2308

intel_cx0_rmw(encoder, INTEL_CX0_BOTH_LANES, PHY_C10_VDR_CUSTOM_WIDTH,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2610

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C20_VDR_CUSTOM_WIDTH,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2615

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C20_VDR_CUSTOM_SERDES_RATE,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2623

intel_cx0_rmw(encoder, INTEL_CX0_BOTH_LANES, PHY_C20_VDR_HDMI_RATE,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2969

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C20_VDR_CUSTOM_SERDES_RATE,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

3192

intel_cx0_rmw(encoder, lane_mask, PHY_CX0_TX_CONTROL(tx, 2),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

3507

intel_cx0_rmw(encoder, lane_mask, PHY_CMN1_CONTROL(tx, 0),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

454

intel_cx0_rmw(encoder, lane_mask, PHY_C10_VDR_CONTROL(1),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

469

intel_cx0_rmw(encoder, lane_mask, PHY_C10_VDR_CONTROL(1),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

499

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_CMN(3),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

503

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_TX(1),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

518

intel_cx0_rmw(encoder, lane_mask, PHY_CX0_VDROVRD_CTL(lane, tx, 0),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

522

intel_cx0_rmw(encoder, lane_mask, PHY_CX0_VDROVRD_CTL(lane, tx, 1),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

526

intel_cx0_rmw(encoder, lane_mask, PHY_CX0_VDROVRD_CTL(lane, tx, 2),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

533

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_OVRD,

drivers/gpu/drm/i915/display/intel_cx0_phy.h

66

void intel_cx0_rmw(struct intel_encoder *encoder,

drivers/gpu/drm/i915/display/intel_lt_phy.c

1038

intel_cx0_rmw(encoder, lane_mask, addr, clear, set, committed);