inpw
word = inpw(PCI_C(PCI_STATUS)) ;
stu = inpw(FM_A(FM_ST1U)) ;
stl = inpw(FM_A(FM_ST1L)) ;
u_short st = inpw(PLC(PB,PL_INTR_EVENT)) ;
u_short st = inpw(PLC(PA,PL_INTR_EVENT)) ;
return (inpw(FM_A(FM_STMCHN))>>4) & 7;
tneg = (u_long)((long)inpw(FM_A(FM_TNEG))<<5) ;
return (u_long)((tneg + ((inpw(FM_A(FM_TMRS))>>10)&0x1f)) |
+ (u_short) inpw(FM_A(FM_FCNTR)) ;
+ (u_short) inpw(FM_A(FM_LCNTR)) ;
+ (u_short) inpw(FM_A(FM_ECNTR)) ;
if (inpw(ADDR(B2_RTM_CRTL)) & TIM_RES_TOK) {
p = (u_long)inpw(FM_A(FM_MDRU))<<16 ;
p += (u_long)inpw(FM_A(FM_MDRL)) ;
while ((inpw(FM_A(FM_STMCHN)) & FM_SNPPND) && k) k--;\
imask = ~(inpw(FM_A(FM_IMSK1U))) ;
while (!(inpw(FM_A(FM_AFSTAT)) & FM_DONE) && k) k--;\
imask = ~(inpw(FM_A(FM_IMSK1U))) ;
#define CLEAR(io,mask) outpw((io),inpw(io)&(~(mask)))
#define SET(io,mask) outpw((io),inpw(io)|(mask))
#define GET(io,mask) (inpw(io)&(mask))
#define SETMASK(io,val,mask) outpw((io),(inpw(io) & ~(mask)) | (val))
#define MDRR() (((long)inpw(FM_A(FM_MDRU))<<16) + inpw(FM_A(FM_MDRL)))
#define GET_ST1() (((long)inpw(FM_A(FM_ST1U))<<16) + inpw(FM_A(FM_ST1L)))
#define GET_ST2() (((long)inpw(FM_A(FM_ST2U))<<16) + inpw(FM_A(FM_ST2L)))
#define GET_ST3() (((long)inpw(FM_A(FM_ST3U))<<16) + inpw(FM_A(FM_ST3L)))
#define IN_82c54_TIMER(port) ((inpw(TI_A(port))>>8) & 0xff)
stu = inpw(FM_A(FM_ST1U)) ;
stl = inpw(FM_A(FM_ST1L)) ;
stu= inpw(FM_A(FM_ST2U)) ;
stl= inpw(FM_A(FM_ST2L)) ;
stu= inpw(FM_A(FM_ST3U)) ;
stl= inpw(FM_A(FM_ST3L)) ;
cntrl = (inpw(PLC(phy,PL_CNTRL_B)) & ~PL_MAINT_LS) |
errors = inpw(PLC(((int) phy->np),PL_LINK_ERR_CTR)) ;
errors = inpw(PLC(((int)phy->np),PL_LINK_ERR_CTR)) ;
(void)inpw(PLC(np,PL_LINK_ERR_CTR)) ; /* clear error counter */
((inpw(PLC(np,PL_STATUS_A)) & PLC_REV_MASK) ==
j = inpw(PLC(np,PL_LE_THRESHOLD)) ;
i = inpw(PLC(np,PL_LINK_ERR_CTR)) ;
switch (inpw(PLC(np,PL_CNTRL_B)) & PL_MATCH_LS) {
reason = inpw(PLC(np,PL_STATUS_B)) & PL_BREAK_REASON ;
n = inpw(PLC(np,PL_RCV_VECTOR)) ;
switch (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_STATE) {
switch (inpw(PLC(np,PL_STATUS_A)) & PL_LINE_ST) {
switch (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_STATE) {
rev = inpw(PLC(p,PL_STATUS_A)) & PLC_REV_MASK ;
(void)inpw(PLC(p,PL_INTR_EVENT)) ; /* clear interrupt event reg */
val = inpw(port) & ~(PL_PCM_CNTRL | PL_MAINT) ;
state = inpw(PLC(phy,PL_STATUS_A)) & PL_LINE_ST ;
if (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL) {
if (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL) {
(void)inpw(PLC(np,PL_INTR_EVENT)) ;
plc_rev = inpw(PLC(np,PL_STATUS_A)) & PLC_REV_MASK ;
if (!(inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL))
if (((inpw(PLC(np,PL_STATUS_A)) & PLC_REV_MASK) !=
!(inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL))
i = inpw(PLC(np,PL_CNTRL_B)) & ~PL_PC_LOOP ;
(ushort)inp(iop + 1), (ushort)inpw(iop));
word = inpw(iop_base + IOP_RAM_DATA);
word = inpw(iop_base + IOP_RAM_DATA);
#define AscGetChipSignatureWord(port) (ushort)inpw((port)+IOP_SIG_WORD)
#define AscGetChipCfgLsw(port) (ushort)inpw((port)+IOP_CONFIG_LOW)
#define AscGetChipCfgMsw(port) (ushort)inpw((port)+IOP_CONFIG_HIGH)
#define AscGetChipEEPData(port) (ushort)inpw((port)+IOP_EEP_DATA)
#define AscGetChipLramAddr(port) (ushort)inpw((PortAddr)((port)+IOP_RAM_ADDR))
#define AscGetChipLramData(port) (ushort)inpw((port)+IOP_RAM_DATA)
#define AscGetChipStatus(port) (ASC_CS_TYPE)inpw((port)+IOP_STATUS)
#define AscGetPCAddr(port) (ushort)inpw((port)+IOP_REG_PC)
#define AscReadChipAX(port) (ushort)inpw((port)+IOP_REG_AX)
#define AscReadChipIH(port) (ushort)inpw((port)+IOP_REG_IH)
#define AscReadChipFIFO_L(port) (ushort)inpw((port)+IOP_REG_FIFO_L)
#define AscReadChipFIFO_H(port) (ushort)inpw((port)+IOP_REG_FIFO_H)
#define AscReadChipDA0(port) (ushort)inpw((port)+IOP_REG_DA0)
#define AscReadChipDA1(port) (ushort)inpw((port)+IOP_REG_DA1)
return inpw(eisa_cfg_iop);
#define AscReadChipDC0(port) (ushort)inpw((port)+IOP_REG_DC0)
#define AscReadChipDC1(port) (ushort)inpw((port)+IOP_REG_DC1)